The philosophy behind our Verification Academy is to provide a comprehensive resource for evolving and maturing your functional verification process skills. We believe that each step an organization takes in evolving verification skills should have measurable results and benefits. With that in mind, I am excited to announce two new modules we are adding to the Verification Academy: UVM Express and Advanced … Read More
Tags: Verification Academy, UVM
In his recent post on UVM: Some Thoughts Before DVCon, Dennis outlined some great ideas about what we think should happen next for UVM. His 3rd point, “UVM needs to bridge the system domain,” is particularly relevant given the newly-formed Accellera Systems Initiative. This is actually an area we’ve been contemplating for a while here at Mentor, and as Dennis indicated, we shared our thoughts on this … Read More
Tags: Verification Methodology, Verification Academy, Functional Verification, SystemC, DVCon, UVM Connect, UVM-1.1, UVM
IEEE Announces Revision to IEEE 1666™ – Adds Transaction-Level Modeling Support
A significant step forward to address standards for advanced system-on-chip (SoC) designs has taken place by the IEEE. The IEEE announced the new revision of the SystemC standard, known as IEEE 1666™-2011, has been approved. While it is a revision of the current SystemC standard, IEEE 1666™-2005, the major new feature … Read More
Tags: SystemC, TLM, Accellera, 1666, OVM, TLM 1.0, TLM 2.0, UVM, OSCI, Verification Academy
iTBA Introduction
If you’ve been to DAC or DVCon during the past couple of years, you’ve probably at least heard of something new called “Intelligent Testbench Automation”. Well, it’s actually not really all that new, as the underlying principles have been used in compiler testing and some types of software testing for the past three decades, but its application to electronic design verification is … Read More
Tags: Functional Verification, Intelligent Testbench Automation, functional coverage, Verification, Verification Academy, testbench
Well, another DAC is behind us, and you know what that means. That’s right, the super-sized DAC issue of Verification Horizons is now available online. You can download the full issue or individual articles from the Verification Horizons tab at Verification Academy.
Over the next few days, I’ll be highlighting some of the articles to give you a taste of the great content available directly … Read More
Tags: UVM, Verification Academy, Functional Verification, Verification Horizons
As the saying goes: Those who fail to plan, plan to fail. With that said, I am excited to announce a new module focused on Verification Planning, which has been one of the Verification Academy’s most-requested subjects for new content. The new Verification Planning module is delivered by our subject matter expert, who literally wrote the book on the subject, Peet James.
The goal of verification planning … Read More
Tags: Functional Verification, OVM, Assertion-Based Verification, Verification Methodology, UVM, Verification Academy
Companion OVM Cookbook Examples Kit also offered for download
Several months ago, the OVM Cookbook and the Examples Kit were made available for online use at the Verification Academy. This proved to be a great help to accelerate the skill level of new OVM users. Given the number of new projects that have deployed OVM and the number of new engineers that now need to use OVM, there is increased demand … Read More
Tags: OVM, Verification Academy, cookbook, Verification Methodology
I’m excited. I’ve had the pleasure of knowing Cliff Cummings for many years, and I was honored a couple of years ago to have him write the foreword in a book that I published on assertions. Now, we have joined forces to do a set of seminars titled: “Assertion-Based Verification for FPGA and IC Design.” The first seminar will take place on January 19, 2010 in Santa Clara, CA, and you can register online … Read More
I was recently quoted in an EDA DesignLine blog as saying that “it is a myth that ABV is a mainstream technology.” Actually, the original quote comes from an extended abstract I wrote for an invited tutorial at Computer-Aided Engineering (CAV) in 2008 titled Assertion-Based Verification: Industry Myths to Realities. My claim is based on the Farwest Research 2007 study that found approximately 37 percent … Read More
I realized a few years back that “time” is an engineer’s most precious resource. It seems that there’s just never enough time. And that certainly impacts the way we all consume information. In fact, if you’re like me, my favorite tool for seeking information these days is Google. I usually end up skimming the first few sentences to quickly determine if the information is relevant to me. I like having … Read More
Tags: Verification Academy
