Advanced Debugging with ModelSim Web Seminar
Date & Registration
| Dec 9, 2008 | 10:00 am PST | - Register Today! |
Overview
Designing today’s powerful products put stress on verification environments. ModelSim extensive integrated support of VHDL, Verilog and SystemC provide a rich opportunity for debug productivity. Each of these languages offer specific debug needs and ModelSim has proven technology that continues to evolve. Features like debugging Verilog deltas, process debugging, tracing through source code, comparing results of waveform files, vcd stimulus. These are a few of the features that will be featured during this comprehensive technical debug seminar.
In addition, this seminar will have a brief presentation and demo of our Codelink tool. Codelink provides source-level debug for code executing on RTL processor models like ARM’s design simulation model (DSM). Codelink is an integral part of the ModelSim GUI giving ModelSim synchronous HW/SW debug capability. Codelink delivers highly interactive debug both during and post simulation.
Who Should Attend
Design and Verification engineers and engineering managers that are looking for additional performance and productivity.