Overview

The Advanced Verification with Questa online seminar will provide an understanding of relevant advanced verification topics utilizing SystemVerilog that will dramatically improve verifying today's complex SoC designs. You will learn the concepts and techniques behind an advanced verification methodology that can immediately be applied to your current projects. These concepts include but are not limited to:

• Testbench Automation
• Constrained-Random Verification
• Assertions
• Functional Coverage
• Formal Verification

The first two segments of the seminar reviews the above concepts. The second portion of the seminar continues with a discussion of these topics to show what they can (and can't) contribute to a verification methodology, and what value the Questa verification platform provides for such a methodology. The seminar closes with showing how to architect and assemble a testbench to deploy these techniques.