Questa / ModelSim Version 6.3 Update AVM (Advanced Verification Methodology) Introduction Seminar

Overview

This half day seminar covers the latest developments around our verification solution which includes ModelSim, Questa, Power Aware Verification and the AVM (Advanced Verification Methodology).

We will present the latest additions to Questa/ModelSim (including Power Aware Verification) and introduce you to our Advanced Verification Methodology. Come and hear how these latest developments can help getting your designs verified and delivered on time and with the quality you expect.

The following topics will be covered:

• latest enhancements to ModelSim/Questa (including performance improvements)
• newly introduced Power Aware Verification latest developments in Design and Verification Languages (SystemVerilog, SystemC, PSL, etc)
• Advanced Verification Methodology (AVM) - how can this methodology help to improve the verification?

The Mentor Graphics Advanced Verification Methodology is the first, true system-level-to-RTL verification methodology that allows you to apply leading-edge verification technologies to designs at multiple levels of abstraction, using multiple languages. The AVM provides libraries of base classes and modules in open-source form and uses TLM interfaces as the communication mechanism between verification components.

Mentor Graphics released a new version of its AVM kit which includes extensive run able examples, in both SystemVerilog and SystemC, and extensive, book-form documentation (the AVM Cookbook) that discusses the different concepts introduced in each example.