Effective Clock-domain Crossing Verification with 0-In CDC Web Seminar
There are currently no dates scheduled for this event
Overview
Clocking issues are the second leading cause of silicon respins. In today's multi-clock designs, errors relating to the management of clock-domain crossing (CDC) signals are difficult to find with traditional verification -- resulting in functional errors in silicon.
This web seminar will examine why CDC signals cause problems for verification, how they can be identified, managed and verified using automated RTL analysis combining formal and simulation techniques. We will discuss the methodology to facilitate effective CDC verification.
Starting Times:
- Pacific Rim: 10:00 am Singapore Standard Time (UTC+8)
- Korea: 11:00 am, Standard Time (GMT +09:00, Seoul)
*Please note, there is a NEW audio option - VoIP...listen to the presentation through your computer speakers, no-dial in necessary!!!
Who Should Attend
- Engineers and Managers interested in effective CDC Verification
What You Will Learn
- How to effectively facilitate Clock Domain Crossing Verification