Innovation in Verification Seminar

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Overview

Join us for a day of Verification. Sessions covering everything from CDC, Verification Management, Processor Based Verification, Low Power, Testbench Automation, Formal Techniques and Open Verification Methodology. Don't miss the chance find out how Mentor Graphics is changing the direction of Verification to keep you ahead of the game.

Agenda

Bangalore

Seminar attendees will NOT have to register for individual sessions. Attendees will select a session topic during each break period by walk-in attendance. This allows seminar attendees the flexibility to transition between session presentations without the "pre-registration" hassles.  View abstract for each topic

Time Topic and Sessions
8:30-9:00 Check-in & Registration
9:00-10:15 Introduction: Make Functional Verification your Competitive Differentiator
10:15-10:30 Break | Attendees to Decide Next Session Participation
10:30-11:15 CDC Verification
-or-
Verification Management
11:15-11:25 Break | Attendees to Decide Next Session Participation
11:25-12:15 Open Verification Methodology
-or-
Processor Based Verification
12:15-1:00 Lunch | Attendees to Decide Next Session Participation
1:00-1:45 TLM for SoC Design and Verification
-or-
Low Power Verification
1:45-1:55 Break | Attendees to Decide Next Session Participation
1:55-2:40 Intelligent Testbench Automation
-or-
Formal Verification
2:40-3:00 Event Closing

Hyderabad

Time Topic and Sessions
8:30-9:00 Check-in & Registration
9:00-10:15 Introduction: Make Functional Verification your Competitive Differentiator
10:15-10:30 Break
10:30-11:00 CDC Verification
11:00-11:30 Verification Management
11:30-12:00 Open Verification Methodology
12:00-12:30 Lunch
12:30-1:00 Processor Based Verification
1:00 -1:30 TLM for SoC Design and Verification
1:30-2:00 Low Power Verification
2:00-2:15 Break
2:15-2:45 Intelligent Testbench Automation
2:45-3:00 Formal Verification
3:00 - 3:15 Event Closing
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