Presentations will discuss the very latest for coverage closure, stimulus generation, fast and efficient VIP, debug techniques that will help you answer the age old question “am I done yet”, details for designing an efficient UVM Testbench and new approaches for Software Driven Verification.
As a featured keynote, Harry Foster will discuss the latest from the 2014 Verification survey, introducing today’s trends and challenges in SoC design and verification as he outlines a path for navigating to success.
Navigating the Perfect Storm: Verification Trends, Challenges and New School Solutions - Presented by Harry Foster
Between 2006 and 2014, the average number of IPs integrated into an advanced SoC increased from about 30 to over 120-while the average number of embedded processors increased from one to as many as 20. Beyond this growing functionality phenomenon are new layers of requirements that must be verified, such as multiple asynchronous clock domains, interacting power domains, security domains, and complex HW/SW dependencies. Add these challenges together, and you have the perfect storm brewing. This talk introduces today's trends and challenges in SoC design and verification and outlines a path for navigating this "perfect storm."
About the Presenter
Harry Foster is Chief Scientist for the Mentor Graphics Design Verification Technology Division. He holds multiple patents in verification and has co-authored seven books on verification. Harry was the 2006 recipient of the Accellera Technical Excellence Award for his contributions in developing industry standards, and was the original creator of the Accellera Open Verification Library (OVL) standard.
Who Should Attend
- Verification engineers and managers