ModelSim DE Evaluation Software
Introducing ModelSim DE. Debug productivity and observability in a ModelSim package.
ModelSim DE Evaluation Detail
How to get it
The ModelSim DE evaluation version is fully functional software. Evaluation periods extend up to 30 days depending on your evaluation needs.
Click on the request evaluation link and complete a short request form. Within one business day a local Mentor Graphics representative will contact you to complete your request.
Support and converting your trial
If you need technical assistance or would like to contact a Mentor Graphics sales representative for more information, please complete the ModelSim Info Request form or call toll free: 1-800-547-3000.
System Requirements
- Supported Operating Systems
- Windows XP (32-bit)
- Windows Vista (32-bit)
- Linux (32-bit)
Contact Mentor Graphics
- ModelSim Info Request or call toll free: 1-800-547-3000
Compare ModelSim Features
General
| Feature | ModelSim PE Block/Small System Simulation, Windows | ModelSim DE Block/Small System Simulation, Windows/Linux | ModelSim SE Large Block/System Simulation, All Platforms |
|---|---|---|---|
| License - Floating License | Option | Option | |
| Language Neurtral License | Option | ||
| ASIC Sign-Off | |||
| HDL Editor | |||
| Integrated Project Manager | |||
| Source Code Templates and Wizards | |||
| Platform-Independent Compiled Database | |||
| Native-Compiled Architecture | |||
| Incremental Compilation | |||
| 32/64-Bit Cross-Compatability |
Languages
| Feature | ModelSim PE Block/Small System Simulation, Windows | ModelSim DE Block/Small System Simulation, Windows/Linux | ModelSim SE Large Block/System Simulation, All Platforms |
|---|---|---|---|
| VHDL | |||
| Verilog | |||
| VHDL Plus Verilog Dual Language | Option | Option | Option |
| Verilog 2001, 2005 | |||
| SystemVerilog Design | |||
| SystemVerilog and PSL IEEE 1850 Assertions | |||
| SystemC 2.2 | Option | Option | Option |
| Analog/Mixed Signal (Questa AMS Product) | Option | ||
| Verilog PLI/VPI | |||
| SystemVerilog Direct Programming Interface | |||
| VHDL FLI |
Debug
| Feature | ModelSim PE Block/Small System Simulation, Windows | ModelSim DE Block/Small System Simulation, Windows/Linux | ModelSim SE Large Block/System Simulation, All Platforms |
|---|---|---|---|
| Interactive Debug | |||
| Post-Simulation Debug | |||
| Enhanced Dataflow Window | Option | ||
| Source Annotation | Option1 | ||
| Hyperlinked Navigation | |||
| Assertion Thread Debug | |||
| Advanced FSM Debug | |||
| C Debugger | Option2 | Option2 | |
| Memory Window | |||
| Extra Standalone Viewer | Option | Option | Option |
| Multiple Waveform Windows | |||
| Waveform Compare | |||
| Transaction Viewing (SystemC) | Option2 | Option2 | Option2 |
| JobSpy | |||
| SignalSpy | |||
| User-Customizable GUI (via Tk) | |||
| Cross Referencing between Windows |
1 - Included in Enhanced Dataflow Option
2 - Included in SystemC Option
Coverage
| Feature | ModelSim PE Block/Small System Simulation, Windows | ModelSim DE Block/Small System Simulation, Windows/Linux | ModelSim SE Large Block/System Simulation, All Platforms |
|---|---|---|---|
| Code Coverage (with Toggle Coverage) | Option | ||
| Unified Coverage Database (UCDB) | 4 | ||
| Coverage Viewer | 4 | ||
| Test Ranking | 4 | ||
| HTML Reporting | 4 |
4 - Data generated with code coverage option
Simulation
| Feature | ModelSim PE Block/Small System Simulation, Windows | ModelSim DE Block/Small System Simulation, Windows/Linux | ModelSim SE Large Block/System Simulation, All Platforms |
|---|---|---|---|
| Single-Kernel Simulation Engine | |||
| Verilog RTL & Gate Performance Optimizations | |||
| VHDL RTL & VITAL Performance Optimizations | |||
| Performance and Memory Profiler | Option | Option | |
| Separate Elaboration | |||
| Waveform Management Tool Set | |||
| VCD and Extended VCD Support | |||
| VCD Re-Simulation | |||
| Batch Mode Simulation | |||
| Integrated Sim Farm Support (via JobSpy) | |||
| Interactive Simulation | |||
| Black Box Regression Suite Throughput | |||
| Checkpoint & Restore | |||
| VHDL 2008 Encryption | |||
| Verilog 2005 Encryption | |||
| SWIFT Interface / SmartModels | Option | Option | |
| SecureIP | Option3 | ||
| Synopsys Hardware Modeler Support |
3 - Option for use with VHDL
Platform Support
| Feature | ModelSim PE Block/Small System Simulation, Windows | ModelSim DE Block/Small System Simulation, Windows/Linux | ModelSim SE Large Block/System Simulation, All Platforms |
|---|---|---|---|
| 32-Bit OS Support | Windows XP/Vista | Windows XP/Vista/Linux | Linux, Solaris, Windows XP/Vista |
| 64-Bit OS Support | Linux x86-64, Solaris 64 |
ModelSim DE Request Evaluation Software
With ModelSim DE we offer:
- native compile
- single kernel simulation technology
- an intuitive, easy-to-use GUI
- integrated project management
- source code templates and wizards
- support for Xilinx SecureIP
- assertion-based verification with SystemVerilog and PSL support.