Advanced Debug with Questa
On-demand Web Seminar
Debug Verilog deltas, process debugging, tracing through source code, comparing results of waveform files, vcd stimulus. Whatever your debugging requirements, this comprehensive technical debug seminar will help you get started!
Whatever your debugging requirements, this comprehensive technical debug seminar will help you get started!
Designing today's powerful products put stress on verification environments. Questa's extensive integrated support of VHDL, Verilog, System Verilog and SystemC provide a rich opportunity for debug productivity. Each of these languages offer specific debug needs and Questa has proven technology that continues to evolve. For advanced environments using SV and OOP Questa offers the best class-based debug envionment with additional integrations for OVM debugging.
For traditional RTL debug, Questa offers features like debugging Verilog deltas, process debugging, tracing through source code, comparing results of waveform files, vcd stimulus.
What You Will Learn
- Debugging of Dynamic Objects
- Debugging Assertions
- Debugging Constraints
About the Presenter
Mr. Seeley has over 27 years of experience in engineering design and verification, and technical marketing. As a Technical Marketing Engineer at Mentor Graphics Corporation he specializes in both assertion-based verification and coverage driven verification methods. He holds a BSEE from Portland State University.
Who Should View
- Managers, designers, verification engineers
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