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Hardware Testing in a DO-254 Program

Hardware Testing in a DO-254 Program

10:10

Technology Overview: The final stage of DO-254 verification and validation, hardware testing examines the performance of the device in its operational environment. DO-254 program manager Michelle Lange explains how a suite... 10:10

Tags: DO-254, ModelSim®, Questa® Advanced Simulator, Questa® CDC Verification, SystemVision

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Simulating the RTL and Running Code Coverage

Simulating the RTL and Running Code Coverage

27:17

Technology Overview: Simulation is part of design verification, a DO-254 supporting process that ensures that the device successfully meets requirements. Simulation tests are typically run throughout the DO-254 design flow... 27:17

Tags: ModelSim®

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Simulating the Gate-Level Netlist with Timing

Simulating the Gate-Level Netlist with Timing

14:11

Technology Overview: Gate-level simulation verifies the output of the synthesis and place & route tools and incorporates timing to bring the model closer to real implementation. It ensures that a device will perform precisely... 14:11

Tags: ModelSim®

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Showing: 1-3 of 3
 
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