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Multimedia Resource Center

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OVM to UVM Migration

OVM to UVM Migration

58:14

On-demand Web Seminar: A step-by-step discussion of how to migrate your OVM code to UVM, including running the transition script, known differences between OVM and UVM and additional steps to take advantage of the new features... 58:14

Tags: OVM, Questa® Advanced Simulator, UVM, UVM Recipe of the Month, Verification Academy

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Debug Productivity with Questa:  Introduction to advanced debug features in Questa for SystemVerilog class-based TB, OVM/UVM, and hard to find problems in RTL

Debug Productivity with Questa: Introduction to advanced debug features in Questa for SystemVerilog class-based TB, OVM/UVM, and hard to find problems in RTL

42:48

On-demand Web Seminar: This webinar will introduce the advanced debug capabilities available in Questa for class-based debug of OOP environments with SystemVerilog, OVM, UVM and SystemC, Assertion debug with SVA or PSL and advanced... 42:48

Tags: Debug, OVM, Questa® Advanced Simulator, testbench, UVM

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Why is OVM and Hardware Acceleration Such a Viable Solution

Why is OVM and Hardware Acceleration Such a Viable Solution

25:56

On-demand Web Seminar: OVM promotes the use of untimed transaction-based testbenches for simulation and such an approach can be complimentary with hardware acceleration for both high performance and effective creation of system... 25:56

Tags: OVM, Questa® Advanced Simulator

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OVM: The Open Verification Methodology

OVM: The Open Verification Methodology

26:39

Technology Overview: This session covers the use and benefits of the Open Verification Methodology (OVM). The OVM brings together verification knowledge, experience and expertise to provide an approach to building verification... 26:39

Tags: OVM, Questa® Advanced Simulator

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