Multimedia Resource Center
Advanced UVM Debugging
47:58On-demand Web Seminar: This web seminar will highlight some new strategies for debugging UVM-based testbenches using Questa 10.2. 47:58
Tags: Debugging, Questa Codelink, Questa CoverCheck, Questa Power Aware Simulator, Questa Verification IP, Questa Verification Management, Questa® Advanced Simulator, Questa® CDC Verification, Questa® Formal Verification, Questa® inFact, UVM
The 2012 Wilson Research Group Functional Verification Study
39:15On-demand Web Seminar: Every two years, Mentor Graphics commissions Wilson Research Group to conduct a broad, vendor-independent study of design verification practices around the world. In this presentation, Harry Foster... 39:15
Tags: ModelSim®, Questa ADMS, Questa Codelink, Questa CoverCheck, Questa Power Aware Simulator, Questa Verification IP, Questa Verification Management, Questa® Advanced Simulator, Questa® CDC Verification, Questa® Formal Verification, Questa® inFact, Wilson Research Group Study
Industrial-Strength Clock Domain Crossing Verification
27:20On-demand Web Seminar: More than 90% of today’s designs contain multiple clocks, and all such designs can potentially fail if communication between clock domains is not correctly synchronized. This webinar presents Questa... 27:20
Tags: Questa® CDC Verification, Questa® Formal Verification
Questa CDC - Verifying CDC Reconvergence with Silicon-Accurate Models Webinar
26:52On-demand Web Seminar: This webinar focuses on the how to ensure that simulations of such designs can nevertheless be accurate predictors of silicon behavior. We show through a set of detailed examples how non-determinism caused... 26:52
Tags: CDC, Debug, Questa® CDC Verification
Clock-Domain Crossing Verification for FPGAs
46:02On-demand Web Seminar: Today FPGA designers are equally plagued by clock-domain crossing (CDC) problems as ASIC designers are. Simulation alone doesn't catch the CDC bugs, resulting in an extremely difficult and time-consuming... 46:02
Tags: CDC, Questa® CDC Verification