Sign In
Forgot Password?
Sign In | | Create Account

Multimedia Resource Center

Showing: 1-5 of 5
Advanced Technology for Advanced Verification,Advanced Technology for Block Level

Advanced Technology for Advanced Verification,Advanced Technology for Block Level

42:40

Technology Overview: Although constrained random stimulus generation is an automated way to achieve coverage of your design’s functionality during simulation, it is now possible to achieve even higher coverage, faster.... 42:40

Tags: Certe Testbench Studio, Codelink, Questa® CDC Verification, Verification Management

View Video
Effective SoC Verification: The Hardware and Software Challenge

Effective SoC Verification: The Hardware and Software Challenge

25:50

Technology Overview: How do you achieve full-chip verification while meeting your project schedule and quality metrics? Your team’s goal is to verify a SoC consisting of an embedded CPU(s), bus fabric, and multiple specialized... 25:50

Tags: Certe Testbench Studio, Codelink, Questa® CDC Verification, Verification Management

View Video
Clock Domain Crossing Verification

Clock Domain Crossing Verification

15:17

Technology Overview: Most ASIC and FPGA designs on the drawing board today have multiple asynchronous clocks. With traditional simulation and static timing based methodologies coming up short in verifying the interaction between... 15:17

Tags: Questa® CDC Verification

View Video
Hardware Testing in a DO-254 Program

Hardware Testing in a DO-254 Program

10:10

Technology Overview: The final stage of DO-254 verification and validation, hardware testing examines the performance of the device in its operational environment. DO-254 program manager Michelle Lange explains how a suite... 10:10

Tags: DO-254, ModelSim®, Questa® Advanced Simulator, Questa® CDC Verification, SystemVision

View Video
Understanding CDC Analysis for a DO-254 Program

Understanding CDC Analysis for a DO-254 Program

23:08

Technology Overview: The drive to smaller, more efficient devices increases the risk of metastability in multi-clock designs, causing subtle problems that are difficult to debug with traditional verification techniques. They... 23:08

Tags: Questa® CDC Verification

View Video
Showing: 1-5 of 5
 
Online Chat