Multimedia Resource Center
Advanced UVM Debugging
47:58On-demand Web Seminar: This web seminar will highlight some new strategies for debugging UVM-based testbenches using Questa 10.2. 47:58
Tags: Debugging, Questa Codelink, Questa CoverCheck, Questa Power Aware Simulator, Questa Verification IP, Questa Verification Management, Questa® Advanced Simulator, Questa® CDC Verification, Questa® Formal Verification, Questa® inFact, UVM
The 2012 Wilson Research Group Functional Verification Study
39:15On-demand Web Seminar: Every two years, Mentor Graphics commissions Wilson Research Group to conduct a broad, vendor-independent study of design verification practices around the world. In this presentation, Harry Foster... 39:15
Tags: ModelSim®, Questa ADMS, Questa Codelink, Questa CoverCheck, Questa Power Aware Simulator, Questa Verification IP, Questa Verification Management, Questa® Advanced Simulator, Questa® CDC Verification, Questa® Formal Verification, Questa® inFact, Wilson Research Group Study
Off-line Debug of Multi-Core SoCs with Veloce Emulation
32:04On-demand Web Seminar: Today’s multi-core system-on-chip (SoC) designs are increasingly dependent on firmware and device drivers, that force users to closely integrate software development and validation with silicon design... 32:04
Tags: Emulation, Questa Codelink, SoC Verification
Making Hardware/Software Co-Verification Easier for ARM Cortex™-A Series Processor-based Designs
35:48On-demand Web Seminar: ARM is leading the industry in multi-core design with its Cortex™-A series applications processors including both its high-performance ARM Cortex™-A15 and its high-efficiency ARM Cortex-A7.... 35:48
Tags: ARM, Questa Codelink, SoC
Verifying Complex SoC Designs with Questa Codelink
33:38On-demand Web Seminar: This session shows how Questa Codelink helps verification engineers reduce the time spent finding design errors and debugging them, at the SoC level, in both simulation and emulation environments. 33:38
Tags: Debug, Questa Codelink, SoC
Easily Inspect & Find Defects in Your Processor-Based Design and Testbench
31:27On-demand Web Seminar: If you are running processor-driven tests with hundreds of thousands of lines of test code in digital simulation on your processor-based design, you know how difficult and time-consuming it is to figure... 31:27
Tags: Processor Driven Verification, Questa Codelink
Easier Debug of Processor-Based Designs
28:59On-demand Web Seminar: During this presentation we will show how to efficiently debug software and hardware together by providing a solution which avoids launching simulation time and time again to figure out what went wrong. 28:59
Tags: Processor Driven Verification, Questa Codelink