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Advanced UVM Debugging
47:58On-demand Web Seminar: This web seminar will highlight some new strategies for debugging UVM-based testbenches using Questa 10.2. 47:58
Tags: Debugging, Questa Codelink, Questa CoverCheck, Questa Power Aware Simulator, Questa Verification IP, Questa Verification Management, Questa® Advanced Simulator, Questa® CDC Verification, Questa® Formal Verification, Questa® inFact, UVM
The 2012 Wilson Research Group Functional Verification Study
39:15On-demand Web Seminar: Every two years, Mentor Graphics commissions Wilson Research Group to conduct a broad, vendor-independent study of design verification practices around the world. In this presentation, Harry Foster... 39:15
Tags: ModelSim®, Questa ADMS, Questa Codelink, Questa CoverCheck, Questa Power Aware Simulator, Questa Verification IP, Questa Verification Management, Questa® Advanced Simulator, Questa® CDC Verification, Questa® Formal Verification, Questa® inFact, Wilson Research Group Study
Cookbook Recipes Beyond UVM: Effectively Modeling and Analyzing Coverage
42:28On-demand Web Seminar: 42:28
Tags: Modeling, Questa CoverCheck, Questa Power Aware Simulator, Questa Verification IP, Questa Verification Management, Questa® Advanced Simulator, UVM
Automating Code Coverage Closure with Questa CoverCheck
36:17On-demand Web Seminar: This webinar will introduce you to the Questa CoverCheck methodology that automates and accelerates the process of code coverage closure. 36:17
Tags: Coverage Closure, CoverCheck, Questa, Questa CoverCheck
C Based Stimulus for UVM
31:44On-demand Web Seminar: Many hardware blocks are designed to interact with software using memory mapped registers. In the final implementation, the system level software, running on a CPU, reads and writes these registers via... 31:44
Tags: UVM, UVM Recipe of the Month, Verification Academy Cookbook
Scoreboards and Results Predictors in UVM
47:53On-demand Web Seminar: If verification is the art of determining that your design works correctly under all specified conditions, then it is imperative that we are able to create an environment that can tell you if this is truly... 47:53
Tags: UVM, UVM Recipe of the Month, Verification Academy Cookbook
UVM Debug
46:19On-demand Web Seminar: UVM class-based testbenches have become as complex as the designs they are meant to verify, and are, in fact, large object-oriented software designs. As such, new debugging techniques and tools must be... 46:19
Tags: Debug, UVM, UVM Recipe of the Month, Verification Academy Cookbook
UVM Connect
48:07On-demand Web Seminar: UVM Connect is a new open-source UVM-based library that provides TLM1 and TLM2 connectivity and object passing between SystemC and SystemVerilog UVM models and components. UVM Connect allows you easily... 48:07
Tags: Register Package, UVM Connect, UVM Recipe of the Month, Verification Academy, Verification Academy Cookbook
UVM Express
46:53On-demand Web Seminar: UVM Express is a collection of techniques, coding styles and UVM usages that are designed to increase the productivity of functional verification. The techniques include raising the abstraction level of... 46:53
Tags: OVM, UVM Express, UVM Recipe of the Month, Verification Academy Cookbook
Configuration in UVM
30:17On-demand Web Seminar: 30:17
Tags: UVM, UVM Recipe of the Month, Verification Academy Cookbook
More UVM Registers
42:11On-demand Web Seminar: The inclusion of the Register Layer was one of the most requested features of UVM. This session will expand on the introductory session delivered in October to discuss how to implement registers and also... 42:11
Tags: Registers, UVM, UVM Recipe of the Month, Verification Academy Cookbook
Sequence Layering
01:01:43On-demand Web Seminar: Many protocols have a hierarchical definition, and sometimes we may want to create a protocol-independent layer on top of a standard protocol to support the development of protocol-independent components... 01:01:43
Tags: Layering, Sequence, UVM, UVM Recipe of the Month, Verification Academy Cookbook
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