Sign In
Forgot Password?
Sign In | | Create Account

Multimedia Resource Center

Showing: 1-2 of 2
Advanced Technology for Advanced Verification,Advanced Technology for Block Level

Advanced Technology for Advanced Verification,Advanced Technology for Block Level

42:40

Technology Overview: Although constrained random stimulus generation is an automated way to achieve coverage of your design’s functionality during simulation, it is now possible to achieve even higher coverage, faster.... 42:40

Tags: Certe Testbench Studio, Codelink, Questa® CDC Verification, Verification Management

View Video
Effective SoC Verification: The Hardware and Software Challenge

Effective SoC Verification: The Hardware and Software Challenge

25:50

Technology Overview: How do you achieve full-chip verification while meeting your project schedule and quality metrics? Your team’s goal is to verify a SoC consisting of an embedded CPU(s), bus fabric, and multiple specialized... 25:50

Tags: Certe Testbench Studio, Codelink, Questa® CDC Verification, Verification Management

View Video
Showing: 1-2 of 2
 
Online Chat