ModelSim DE, Assertion-Based Verification with SV, PSL, and Xilinx SecureIP Support

Overview

Observe debug productivity in a ModelSim package.

We now offer support for Xilinx SecureIP and Assertion-Based Verification (ABV) with SystemVerilog and PSL support.  ModelSim also offers native compile, single kernel simulation technology, an intuitive, easy-to-use GUI, integrated project management, source code templates and wizards. 

ModelSim is the simulator of choice for leading electronics companies in all industries.

What You Will Learn

  • How Assertion-Based Verification improves verification effectiveness
  • How to manage windows to get the most of debug
  • How to compare simulation results to expose issues between design revisions
  • How to trace design issues to their source using enhanced debug features
  • How to use advanced code coverage features including expression and conditional coverages

About the Presenter

Presenter Image Cuong Nguyen

Cuong Nguyen has over 25 years of experience in Silicon Valley high tech companies including HP, Sun, LSI logic, and Cisco. He has many years of design experience in ASIC, FPGA, and board in various segments including computers, consumer, and networking. Prior to joining EDA Direct he held Field Application Engineering positions at Altera Inc and at Avnet supporting customers in the Bay area designing with Altera and Xilinx FPGAs.

Who Should View

  • Design Engineers
  • Verification Engineers
  • FPGA Designers

ModelSim DE Features:

  • Native compiled, Single Kernel Simulator technology
  • VHDL, Verilog, PSL, and SystemVerilog design and assertions constructs
  • Intelligent, easy-to-use GUI with Tcl interface
  • Integrated project management, source code templates, and wizards
  • Wave viewing and comparison; objects, watch, and memory windows increase debug productivity
  • Code coverage
  • Standard support for Xilinx SecureIP
  • SystemC option available