Beat your functional verification/software development timescales with Acceleration/Emulation
Whether at the block level, chip level or system level, you can beat your development schedules with Veloce acceleration and ICE solutions. With advances in transaction based verification environments, including methodologies like OVM, the power of Veloce hardware emulation and TestBench Xpress can be released to deliver acceleration of 100X to 400X over pure simulation.
Today’s multi-core system-on-chip (SoC) designs are increasingly dependent on firmware and device drivers, that force users to closely integrate software development and validation with silicon design...…View On-demand Web Seminar
This video provides an overview of Mentor Graphic's ModelSim software. You will learn the essential skills needed to create a simulation environment and what tools are available to quickly debug the...…View On-demand Web Seminar
Other Related Resources
White Paper: IP Replay makes it more practical and profitable for IP vendors to engage with IP end users early on by delivering a support model and debugging mechanism for verifying third-party IP within SoCs or IP-subsystems....…View White Paper
Success Story: Developing an ARM-based reference design, STMicroelectronics engineers linked a testbench running on a simulator with a design executed on an emulator, taking advantage of the best of both verification...…View Success Story
White Paper: Broadcom® recently developed a unified, scalable, verification methodology based on the Veloce® emulation platform. In order to test this new environment, they ran a test case, which proved that...…View White Paper