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Next Generation in Verification

Related Resources


Advanced UVM Debugging

This web seminar will highlight some new strategies for debugging UVM-based testbenches using Questa 10.2.…View On-demand Web Seminar

The 2012 Wilson Research Group Functional Verification Study

Every two years, Mentor Graphics commissions Wilson Research Group to conduct a broad, vendor-independent study of design verification practices around the world.  In this presentation, Harry Foster...…View On-demand Web Seminar

Harry Foster at DAC 2012

Interview with Mentor Graphics' Harry Foster at DAC 2012.…View Technology Overview

Other Related Resources

Questa Covercheck: An Automated Code Coverage Closure Solution

White Paper: This white paper explores the debugging aspect of code coverage closure, and how Questa CoverCheck’s unique ability of formal technology can automatically generate simulation exclusion files to improve...…View White Paper

Using Formal Verification to Check SoC Connectivity Correctness

White Paper: Formal verification offers a solution that is quick, exhaustive and allows for efficient debug. It’s true that traditionally, chip-level formal verification is impractical. The approach usually targets...…View White Paper

Static Verification for Complex Designs

White Paper: Traditionally, simulation-based dynamic verification techniques — such as directed tests, constrained-random simulation, and hardware acceleration — have been the work horses of functional verification....…View White Paper

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