Re-defining Verification Performance
Performance is key to achieving verification productivity. Yet, traditional brute force approaches to improving performance will only provide incremental benefits, which will not keep up with Moore's Law. Achieving 100x to 1000x improvements in verification performance requires thinking outside the box. This keynote provides a historical survey of ways other industries have faced their performance issues, drawing on examples ranging from Henry Ford to the Intel 8088 microprocessor. Then, based on these observations from other industries, a prescription is offered to address today's verification performance issues.
This web seminar will highlight some new strategies for debugging UVM-based testbenches using Questa 10.2.…View On-demand Web Seminar
Every two years, Mentor Graphics commissions Wilson Research Group to conduct a broad, vendor-independent study of design verification practices around the world. In this presentation, Harry Foster...…View On-demand Web Seminar
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