Verification Management and Planning
On-demand Web Seminar
There are three dimensions to any IC design project: the process, the tools and the data. Mentor Graphics Questa® Verification Management offers a comprehensive approach to verification management that handles them all.
When verification is not under control, project schedules slip, quality is jeopardized and the risk of re-spins soars. What’s required is a common platform and environment that provides all parties – system architects, software engineers, designers and verification specialists – with real-time visibility into the project. And it’s not just to the verification plan, but also to the specifications and the design, both of which change over time.
There are three dimensions to any IC design project: the process, the tools and the data. Mentor Graphics Questa® Verification Management offers a comprehensive approach to verification management that handles them all. With the flexibility which allows enabling technologies to be deployed either alongside current legacy verification environments, incrementally replace them in a modular fashion or benefit from the power and integration of the complete solution.
Verification management should be based around a structured process but also requires the tools to allow this process to be automated. Given the rise in design complexity, it’s no surprise that data management is increasingly the foundation of any verification management activities. Questa’s verification management capabilities are built upon the Unified Coverage Database (UCDB) which was architecture with the requirement to allow all the relevant verification data to be stored in an extremely efficient format with open access.
What You Will Learn
- How to close the loop between verification plans and verification using electronic closure to ensure you hit your market windows on schedule.
- How to manage priorities, risk and keep resources on track.
- How to reduce the volume of data within the process while still having full visibility into the progress of the project.
- How to jumpstart the debug process by analyzing results across multiple tool runs.
- How reduce maintenance, improve automation and ensure your efforts are focused on verification and not environment infrastructure.
About the Presenter
Darron May has over 25 years of experience in the electronics industry including board, fpga, and chip design & verification, pre/post sales support, applications, consulting and technical marketing. As the Manager of Verification Analysis Solutions in the Design Verification Technology Division of Mentor Graphics, Mr. May has most recently been focused on architecting Verification Management solutions based on customer requirements and driving the deployment of the tools worldwide. Prior to Mentor Graphics, Mr. May has held positions in the engineering and applications management in the Datacoms and EDA industries, for Racal-Datacom, Racal-Research, Model Technology Inc, and through distribution including Synplicity, Summit Design, TSSI, InterHDL, and Simucad. Mr. May holds an HND in Electronic Engineering from Basingstoke college of technology.
Who Should View
- Design and Verification Engineers and Managers
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