Questa Vanguard Program - OLD
Today's EDA marketplace demands integrated world-class solutions. No one company alone can deliver this. Mentor Graphics has created the Questa Vanguard Program (QVP) to offer Questa users the best available "total solution" comprised of Mentor Graphics' world-class tools and key partner technologies.
The Questa Vanguard Program has been established to bring you world-class product integrations and interoperability to enhance your Questa verification options and build a strong and comprehensive SystemVerilog ecosystem. QVP extends Mentor Graphics' breadth of design and verification technologies through partnership with other industry-leading companies that provide verification related tools and methods, verification IP, conversion services, training and consulting. This allows Questa users to easily identify the right partner for their design and verification needs.
With a strong balance of QVP partners that support a broad set of verification IP, Mentor Graphics leverages the verification IP qualified for use with the Questa platform to deliver greater value to Mentor customers. QVP partners support more than 30 protocols with over 50 verification IP elements.
See the list below for details on what our partners offer you with Questa.
Want to join the Questa Vanguard Program?
Send us your interest in becoming a Questa Vanguard Partner. Once we receive your request, you will be contacted.
Membership in the Questa Vanguard Program is open to those companies who work with Mentor Graphics verification customers and wish to promote the development and use of EDA tools, verification IP, training services and verification methodology consulting that support the SystemVerilog standard for design and verification. QVP members gain access to the Questa platform to ensure design and verification data interoperability and to provide support for mutual customers
Ace Verification
Website: http://www.aceverification.com
Company overview: Ace Verification is the leading provider of training and consulting in applying Advanced Verification Methodology. Ace Verification brings together top industry proven practices into a comprehensive methodology focused on achieving consistent quality results.
List of VIP:
- Coverage Revealed Seminar for SystemVerilog - Available with Questa
List of verification services:
- Verification Consulting
- Advanced Methodology Training
- Verification Leadership Seminars
Key contact: Akiva Michelson Akiva@AceVerification.com
Website: http://www.doulos.com
Company overview: Doulos is the global leader for the development and delivery of world class, market-leading training solutions for SoC, FPGA and ASIC design and verification. An independent company, Doulos sets the industry standard for high quality technical training in SystemCTM, SystemVerilog, PSL, e, VHDL, Verilog, Perl & Tcl/Tk. Doulos in-house expertise and world leading know-how in key technology areas has contributed to the success of more than 600 companies across 30 countries. Classes are scheduled regularly in the USA and Europe and in-house training is delivered worldwide.
List of verification services:
Training development and world-wide delivery (public and in-house classes)
- Comprehensive SystemVerilog
- Fundamentals of SystemVerilog
- Assertion-based Verification using SystemVerilog
- Test-bench Automation using SystemVerilog
- SystemVerilog using QuestaSim
- Modular SystemVerilog
- Expert VHDL Verification
- Expert Verilog Verification
- Assertion-based Verification using PSL
- Comprehensive e
Key contact: Doris Schulze Doris.schulze@doulos.com
Website: http://www.einfochips.com
Company overview: eInfochips Inc., with offices in Santa Clara, California, and Ahmedabad and Pune, India, is a leading provider of cutting edge ASIC design and verification services, embedded systems solutions and IP cores. The company's capabilities extend from specification to system, with knowledge on ASIC design & verification, physical design, pre and post silicon validation, system validation, board design and embedded firmware development. The company's India and US design centers have delivered SoC and embedded solutions to a variety of customers thus increasing their cost-effectiveness, reducing their time-to-market and growing their market strength.
List of VIP:
SONET/SDH
SPI4.2
SAS (Serial Attached SCSI)
SATA (Serial ATA)
UWB (Ultra-wide Band)
OTN
Please note that these are VIPs done on different platforms. They may not be on SystemVerilog
List of verification services:
Functional Verification
- SoC Verification
- SystemVerilog, Vera, e, SystemC, Verilog, VHDL, C and C++ based Verification
- Verification IP development
- Compliance Testing
- Verification Environment Migration
Formal Verification
- Formal RTL Verification
- Equivalency Checking
- Assertion-based Verification
- Inline Assertions
- Interface Assertions
Key contact: Manish Patel manish.patel@einfochips.com
Website: http://www.expertio.com
Company overview: Expert I/O offers off the shelf Verification IP and Architecture, Design, and Verification services for ASICs and SOCs. With a extensive industry experience and a proven track record, you can expect the highest quality results.
Expert I/O are experts in Fibre Channel, SATA, SAS, PCIX / PCI Express, SPI4.2, XAUI and ARM bus protocols just to name a few. Expert I/O's client list includes many of the leading public companies in the Storage and Networking markets as well as a few emerging start-up companies.
List of VIP
- SATA I & II SVC (Serial ATA)
- SAS-1 SVC (Serial SCSI)
- Fibre Channel SVC (Point to Point, Arbitrated Loop, and 10Gb XAUI interfaces)
- XAUI SVC
Note: SVC stands for System Verification Component
List of verification services:
- Experts in networking and storage protocols, as well as many embedded processor interfaces.
- Fluent in all verification languages including Specman, Vera, Testbuilder C/C++, Verilog, SystemVerilog
- Creation of test plans, Architecture and design of comprehensive test benches, test case writing, design debug, performance modeling and analysis.
Key contact: info@expertio.com
Website: http://www.hdl-dh.com
Company overview: HDL Design House specializes in creating and providing IP cores for ASIC and System on Chip designs, Verification Products (VP) and VITAL models. HDL Design House is also providing dedicated engineering teams for outsourcing services for design and verification SoC projects of major semiconductor companies.
List of VIP:
- I2C SV Monitor/Checker
- AMBA AHB SV Monitor/Checker
- AMBA 3 APB SV Monitor/Checker
- OCP 2.0 SV Assertion Checker
List of verification services:
- SystemVerilog VE development
- VP development
Key contacts: Predrag Markovic p-markovic@hdl-dh.com
Bogdan Bizic b-bizic@hdl-dh.com
Website: http://www.hdlab.co.jp
Company overview: HD Lab, Inc. was founded in 1996 as a professional solution provider for large-scale digital system design. Since its inception, the company has focused on the advanced design language aspect of large-scale LSI design. Their services are provided and delivered in various forms including consulting services, training, CD-ROM contents and publications, to name a few. The company is headquartered in Shin-Yokohama, Japan and serves customers in Japan.
List of verification services:
HD Lab is working on several on-going classes based on Questa.
- "Introduction to SystemVerilog" -- on-going
- "Assertion using SystemVerilog" -- on-going
- "Testbench using SytemVerilog" -- planned
(all training classes are offered in Japan in Japanese)
Key Contact: Hiroshi Kondo kondo@hdlab.co.jp
Website: http://www.intrinsix.com
Overview
Intrinsix is an IP-enabled ASIC, SoC, Digital/Analog/Mixed-Signal/RF design solutions company. We provide IP and IC development solutions to the world's leading electronic systems companies. Our distributed and global presence drives customer time-to-market requirements via unparalleled capabilities and local support.
Our focus includes:
- ASIC/FPGA/SoC/RFIC - 650+ designs in digital, analog, mixed-signal and RF including multiprocessor System on Chip designs and extremely large/complex designs
- Sigma-Delta Modulator based Data Converters - ADC and DAC for audio, video, data conversion and RF Applications
- SoC Development Platforms – Full platforms plus support modules give you a head start on you SoC program. Includes several application specific versions
- VGA/SXGA Cores - Suitable for ASIC or FPGA implementation
- Intrinsix Verification IP - Developed to support IP integration and chip design
- Custom IP Block Design - We can develop custom IP just for you or as part of a development partnership
- Embedded Software Design - An integral part of IP and SoC projects
List of Verification IP:
- Network Verification IP Suite
- Wireless Verification IP Suite
- Digital Media Verification IP Suite
- AMBA Verification IP Suite
List of Verification Services:
Verification is critical to the success of any design project. The Intrinsix engineers are proficient in behavioral simulation, logic simulation, simulation environment development, test-case development and compliance testing. Intrinsix can provide specific verification services that include:
- Verification requirements specification development
- Detailed ASIC and sub-module verification plans
- Build environments
- Regression test environments
- SoC verification environments
- VHDL, Verilog, C/C++ and HLVA expertise
- Verisity, VERA, test builder expertise
- Code coverage analysis
- Traditional test-bench development
- Design review / code reviews
- Source code control environments
- Script development
Intrinsix has been applying these services across the Networking, Wireless, and Digital Media Platforms for the last 16 years. The results are application specific verification solutions that are cost effective and accelerate our customer's time to market with the highest quality product. Intrinsix offers off-the-shelf solutions that can significantly improve your design/verification team's productivity (see Verification IP listed here or at http://www.intrinsix.com/verification.htm)
Key contact(s)
Jeff Pollak jpollak@intrinsix.com - Director of Marketing Communications
Intrinsix Corp., 33 Lyman St., Westboro, MA 01581
T: 508.836.4100x206 F: 508.836.4222 M: 508.735.1555
www.intrinsix.com
Website: http://www.mu-e.com
Company overview: MU-Electronics is a service company specializing in microelectronics design. Our teams consist of analog and digital designers (front end and back end) who can work in two different ways: either providing on client site technical assistance, or carrying out projects for partners in our own design center.
Key contacts: Mohamad Chehadi mchehadi@mu-e.com, contact@mu-e.com
Website: http://www.nobug.com
Company overview: NoBug is an expert digital design verification company that masters a full range of technologies (functional, formal, assertion-based) with a variety of tools (Questa, SystemVerilog, Verilog-PLI/C, RuleBase, Specman, OpenVera). NoBug teams distinguish themselves by the proven capacity to deliver turn-key, high quality ASIC and SOC validation. NoBug has proven digital design experience, materialized in several custom RTL components and verification IP's. NoBug works together with partners and clients to develop stand-alone EDA tools as well as into improving the software that supports various design/validation workflows.
SystemVerilog and Questa support at NoBug Consulting
NoBug offers full support for SystemVerilog and Questa in terms of services and IP development:
- SystemVerilog training programs: language, tools specific training, methodology migration.
- Module level verification: we leverage the support of SystemVerilog for: random-directed stimulus generation, coverage specification and assertions.
- System level verification: we employ the advanced features of SystemVerilog to build reliable, effective testbenches (classes, inheritance, events, callbacks, IPC).
- Verification methodology: Nobug's own methodology is now supporting SV. We are also supporting third party methodologies such as AVM, TLM and VMM.
List of verification services:
NoBug Consulting offers the following services in connection to Questa and
SystemVerilog:
- SystemVerilog Deployment Services
- methodology migration
- SV verification pilot projects
- Turn-key Verification Services
- verification planning
- build and deploy testbenches and regressions
- Verification Upgrade
- translate PLI, C-based testbenches to SV
- provides better, more quantifiable results
- achieve increased performance
- leverage the increased manageability and predictability made
possible with Questa - Verification Migration
- translate legacy IP's (OpenVera, e) to SV
- migrate custom or legacy testbenches to SV
Key contact:
Business Development
Moshe Shalev, Founder, General Manager moshe@nobug.com
Engineering
Olea Pascu, Engineering Department Manager olea@nobug.com
Website: http://www.nsysinc.com
Company overview: nSys is the leading provider of Verilog based Verification IPs. nSys provides products & services to Accelerate Designs of its customers by focusing on the verification phase of ASIC development.
nSys Verification Suite (nVS) is a complete verification solution consisting of BFMs, Checker +Monitor and Test suites for standard interfaces and protocols that enables users to quickly build a system-level environment to verify their advanced SoC designs. The nVS family of VIPs are used being used by hundreds of developers to accelerate their ASIC/FPGA/IP design.
nSys offers services for development of custom VIPs and Independent Verification of ASIC/FPGA/IP.
nSys has Marketing & Sales office in Newark, CA and development centers in New Delhi, India.
List of VIP:
- PCI EXPRESS nVS
- AMBA AXI nVS
- AMBA AHB/APB nVS
- SATA nVS
- PCI-X nVS
- PCI nVS
- DDR2 nVS
- ASI nVS
- PCMCIA nVS
- I2C nVS
- SMBus nVS
- IEEE 1284 nVS
- UART nVS
List of verification services:
- Independent Verification of ASIC/FPGA/IP
- Custom VIP development
Key contact: Mr. Atul Bhatia info@nsysinc.com
Website: http://www.paradigm-works.com
Company Overview: Paradigm Works is a pioneering provider of Engineering Consulting Services, Verification IP, and EDA Software. The company offers expertise in all phases of ASIC & FPGA development including using important industry standard languages like System Verilog, System C, and e and industry standard protocols such as PCI Express, Ethernet, and USB. Headquartered in Andover, Massachusetts, with business activities throughout North America, Europe and Asia, Paradigm Works employs approximately 25 people, with an engineering staff that averages nearly 14 years of system and chip design experience per engineer. Paradigm Works list of over 75 successful clients include Agere, Cisco Systems, Freescale, HP, IBM, Intel, Marconi, Mentor Graphics, Motorola, Nortel, Philips, Rambus, Sun Microsystems, Toshiba, and Vitesse.
List of VIP:
- System Verilog FrameWorksTM - Software to jumpstart the creation of System Verilog testbench environments
- Release WorksTM - Software to manage and automate the regression and release process
List of Verification Services:
- Architecture and Design of Verification Environments
- Architecture and Design of Verification IP
- Verification Methodology Consulting, including Reuse Methodology
- Verification Planning and Implementation
- Expertise in all major HVLs, including System Verilog
- System Verilog Framework software (SV FrameWorksTM) integration
- Expertise in Mentor Seamless
- Release Management Software (Release WorksTM) integration
Key Contact: Michael Hoyt michael.hoyt@paradigm-works.com
Website: http://www.psi-e.com
Company overview: PSI Electronics is a microelectronic design services company building on a decade of hardware design experience.
PSI Electronics provide complete ASIC/FPGA development in its design centers and customer on-site support services for the semiconductor, aerospace and automotive industries. The company has a strong expertise in verification that is recognized by our semiconductor partners.
Verification services:
- Verification Plan Definition,
- Testbench Development (SystemVerilog, e, VHDL)
- Testsuites Development (SystemVerilog, e, VHDL)
- Formal verification (SystemVerilog, psl)
- Modeling (SystemC)
- Verification Component Development (SystemVerilog, e)
- Assertion Library Development (SystemVerilog, psl)
- TestBench Qualification
Key contact: Eric Louveau elouveau@psi-e.com
Website: http://www.realintent.com
Company overview: Real Intent, Inc. is a privately held electronic design automation (EDA) company that improves logic verification efficiency for its customers. Through unique application of Formal techniques, the Real Intent suite of tools, Verix™ and PureTime™ provide powerful solutions to important design problems, from the very beginning of the design cycle, to the end of the implementation cycle. "Formal from Spec to Sign-off."
Tool Integrations:
Verix Clock Intent SimPortal connects to Questa: The interface is through RTL models that augment the user design to model the effects of metastability.
Key contact: Rich Faris rich@realintent.com
Website: http://www.scaleochip.com
Company overview: Scaleo Chip is a Fabless Design House developing and producing custom ASIC within 6 months, with complexity, reactivity and first silicon right at the first time. For any applications you may imagine, we are your partner for complex ASICs development.
List of verification services: R&D design verification
Key contact: sales@scaleochip.com
Website: http://www.simantis.com
Company overview: A leading provider of electronic design expertise, services, and resources, SiMantis works directly with fortune 500 and startups to enhance and augment the design and development effort from specification to tape out. At SiMantis, our focus is on reducing development time while delivering quality and value.
List of VIP:
- Specman-Based UART
- Specman-Based SATA
- Specman-Based 10M/100M/1G/10G Ethernet
- Utility Package for Specman Elite
List of verification services:
- Verification Methodology Consulting
- Turnkey Design and Verification Services
- Technical Staff Outsourcing
- Verification IP Products
- Training Services
Key contact: Sasan Iman iman@simantis.com
Website: http://www.spiratech.com
Company Overview:
One of Gartner Group’s ‘must see’ technologies of DAC 2005, SpiraTech has established itself as a leading provider of abstraction conversion tools, with its CohesiveTM family of multi-level Bus Functional Model (BFM) solutions. Multi-level BFMs are universally recognized as the essential elements of the emerging Electronic System Level (ESL) methodologies, enabling engineers to easily mix and match multiple levels of abstraction thus providing a complete verification flow which includes test benches, Transaction Level Models, RTL Models, emulators, FPGA prototypes, and hardware and software debuggers. This allows fast, early simulation, emulation, stimulation and visualization of entire silicon systems, dramatically accelerating all types of software development as well as providing a pre-silicon platform for hardware/software integration, functional verification and performance validation.
Verification IP:
SpiraTech supplies multi-functional, multi-level, multi-language Bus Functional Models for the following protocols.
AMBA (AXI, AHB, AHB Lite, APB), PCI Express, USB 2.0, Ethernet (MII, RMII, GMII), OCP/IP, CAN, HDMI, DDR, UART
Because SpiraTech also supplies the EDA Industry’s only Transactor Synthesizer and BFM Compiler it can produce a complete range of BFM’s for any protocol within 13 weeks.
Verification Tools:
SpiraTech’s CohesiveTM Generator synthesizes transactors and compiles BFMs from the single source input of protocol assertions. Cohesive Generator compiles both readable synthesizable Verilog and C++. Cohesive Transformer provides wrappers and interfaces for SystemC, System Verilog and VHDL
Key Contact: info@spiratech.com
Website: http://www.sd.com
Company overview: Summit Design is a technology leader in Electronic Systems Level (ESL) design, with a proven track record going back to 1991. As the pioneer in Register Transfer level (RTL) analysis, debug, and authoring technology, Summit Design has extended these capabilities to ESL, giving system designers and architects greater ability to predictably achieve better quality of results and reduce product schedule risks.
Summit Design provides a complete set of products and solutions that are based on the industry standard SystemC and targeted for combined hardware and software architecture design and analysis for multi-core System-on-Chip (SoC) and large-scale systems.
List of VIP:
http://www.sd.com/partners/index.html
List of tool integrations with Questa:
Visual Elite & Vista
Key contact: askus@sd.com
Website: http://www.sunburst-design.com
Company Overview: Sunburst Design offers World Class Verilog and SystemVerilog training for Synthesis and Verification. Courseware is developed by renowned expert Cliff Cummings. His award winning papers and presentations are incorporated into the most advanced industry training courses available. Cliff is the only trainer to help develop every Verilog and SystemVerilog standard.
List of verification services:
The world class courses offered by Sunburst Design, Inc. are as follows:
- Accelerated Introduction to Verilog-2001 & Best Coding Practices (1 Day Course)
- Introduction to Verilog-2001 Design (2 Day Course)
- Comprehensive Verilog-2001 Design & Best Coding Practices (4 Day Course)
- Advanced Verilog-2001 for Synthesis & Verification (4 Day Course)
- Advanced SystemVerilog for Design (3 Day Course) Sunburst Design
- Advanced SystemVerilog for Verification (3 Day Course)
Key Contacts:
Cliff Cummings, President cliffc@sunburst-design.com
Bill Boland, Director of Sales & Marketing billb@sunburst-design.com
Website: http://www.sutherland-hdl.com
Company overview: Sutherland HDL, Inc. provides expert SystemVerilog training and consulting services for design and verification. We are active members of the Verilog and SystemVerilog standards groups, and the editor for both the Verilog-2005 and SystemVerilog-2005 IEEE Language Reference Manuals. This in-depth knowledge of the standards is reflected in our training services. Our training courses are not simple language courses -- the focus is how to properly use SystemVerilog to receive full benefit from its design and verification capabilities. Sutherland HDL works closely with Mentor's Questa engineering teams to ensure that our training show how to best use SystemVerilog with Mentor design and verification tools.
List of verification services:
Sutherland HDL, Inc. provides the following SystemVerilog workshops:
- SystemVerilog for Synthesis for Design Engineers
- SystemVerilog Testbench for Verification Engineers
- SystemVerilog Assertions for Design and Verification Engineers Sutherland HDL also provides consulting services to assist engineering teams that are adopting SystemVerilog.
Key contact: Stuart Sutherland, stuart@sutherland-hdl.com
Website: http://www.syosil.com
Company overview: SyoSil is a consulting company holding broad expertise within the field of System-on-Chip and ASIC solutions, including specification, methodologies, design and verification. We are specialized on verification strategies, advanced EDA verification tools including formal methods (property checking) and upcoming EDA tool languages such as SystemVerilog and SystemC.
List of VIP:
SyoSil offers customer adapted Verification IP, created in SystemVerilog, using the methodology of your choice. For a specific protocol, we create following VIP components to accommodate a state-of-the-art constrained random verification flow:
- Data objects / classes encapsulating high-level transactions
- Random generators able to create any possible sequence of random transactions
- Bus Functional Models (BFM's) and Transactors
- Assertion monitors capturing the protocol specification, ready for simulation and formal verification
- Functional coverage metrics to measure that protocol has been fully exercised
List of verification services:
At SyoSil, we believe that the future for digital hardware design and verification will be using SystemVerilog. This is why we are experts in:
- RTL design using VHDL, Verilog95/01 and SystemVerilog
- Assertion based design & verification using SystemVerilog Assertions, including formal verification (property checking).
- Object oriented test bench design using SystemVerilog Test Bench and SystemC
- First-class functional verification using assertion based and constrained random verification methods, including design of reference models.
Combined with our knowledge of state-of-the-art EDA tools, we are capable of materializing the benefits of SystemVerilog within your organization, leading to shorter design times and improved verification quality.
Key contact: Managing Director, Peter Jensen peter@syosil.com
Website: www.trustic.ro
Company overview:
TrustIC is based in Bucharest, Romania and it's one of the first companies offering SystemVerilog verification IPs. Our bussiness philosophy is based on 3 aspects: quality, reduced time-to-market, reduced costs.
The TrustIC team has built its experience while working for several wireless network platforms. Working on these platforms exposed us to cutting edge design & verification technologies and tools. Our engineers are experts in SoC interconnect, power management and image processing.
List of verification services:
- VIP development using any of the available methodologies: AVM, VMM.
- Verification/Test Plan Development
- Design Verification Environment Development
- High-level modeling
- Coverage driven verification
- Corner-cases extraction and testing
- Formal Verification
- Test Environment Development
- Fault Simulation & ATPG
- DFT & Test vector generation
List of verification IP:
- OCP SystemVerilog Verification IP (OCP VIP)
- OCP 2.0/2.1 SystemVerilog assertion library
- VMM library (tool/vendor independent)
Key contact: contact@trustic.ro
Website: http://www.vericine.com
Company overview: Vericine provides Verification consulting, verification outsourcing and turn key projects. The company provides experts for verification services for ASIC and FPGA projects. Vericine provides services mainly in Israel, Europe and Asia.
List of verification services:
- Module level verification
- System level verification
- SOC verification
- Turn key projects
- Verification specifications, planning and environment design
- Hardware-software co-verification
- Leverage existing environments
- Ongoing supervision and code reviews
- Verification Methodologies
- Verification courses
- Script development
- Coverage planning, analysis
Key contact: ronen@vericine.com, info@vericine.com
Website: http://www.verilab.com
Company overview: Verilab is a highly focused professional consulting firm, specializing in advanced VLSI verification and design flows. Verilab's expertise covers the full spectrum of verification technologies including Vera, SystemVerilog, SystemVerilog Assertions, C, C++, SystemC, and e/Specman. The company also has particular expertise in flow automation, Clock Domain Crossing, test plan definition, test bench development, and complete SOC validation. Founded in Scotland in 2000, the company has grown to its current an international presence in Germany, the UK and the US.
List of verification services:
Verilab is developing a range of consulting packages, many of which have associated IP. The most recent of these is the Clock Domain Crossing (CDC) Workshop. We also have packages focused on Object Oriented Programming (OOP) in SystemVerilog, and Assembler-Driven Verification. We also provide customized consulting in flow migration, configuration management for EDA, and verification reuse.
Key contact: terry.lawell@verilab.com
Website: http://www.veri-sure.com
Company overview: Founded in 2001, VeriSure has been operating since, mostly in Israel, providing expert e, Verilog, SystemVerilog, vera consulting, and training services for design, verification. VeriSure also gives start-up tool-selection, IP, VIP selection process consulting services. VeriSure is a member of IEEE1649 activities. The in-depth knowledge of the various tools is reflected in the proficient manner in which its engineers provide their services.
Verification IPs:
- Base module generic environment
- AES, DES, 3DES
List of verification services:
- ASIC design & Verification Consulting in all popular platforms
- Specman & Vera & General verification classes
- Work is flexible to customer needs (on or off site).
- Module level verification, planning and execution
- System level verification, planning and execution
- IP selection assistance
- Tool chain, flow definition
- HW-SW co-verification (emulators as well)
- Coverage directed
Key contact(s):
Website: http://www.abv-sva.org
Company overview: Provides training and consulting in the field of assertions with PSL and SVA, and in the application of SystemVerilog frameworks for testbench designs. Authored several books in SystemVerilog Assertions, PSL, VHDL, Verilog, and Design Processes including verification.
Key contact: ben@abv-sva.org
Website: http://www.whdl.com
Company Overview: Willamette HDL has taught SystemVerilog for design and for verification since the earliest days of the language. our experience with high level system design and verification is second to none. For 13 years we have delivered training to thousands of students on 4 continents in languages like SystemVerilog and SystemC as well as Verilog and VHDL. our instructors are recognized for their subject knowledge and their ability to communicate complex ideas clearly.
List of training classes:
- SystemVerilog for Design - Introduces the experienced Verilog designer to the new features of SystemVerilog. With an emphasis on RTL coding the class helps students get started on using SystemVerilog for design.
- SystemVerilog for Verification - Introduces the experienced Verilog verification engineer to the incredibly powerful features of SystemVerilog like Object Oriented Programming, Constrained Randomization and Functional Coverage.
- Introduction to SystemVerilog - Written especially for non-Verilog users this course introduces the student to a broad range of language elements from RTL design to Verification1
Key Contacts:
Mike Baird mike@whdl.com
Tim Corcoran tim@whdl.com
Website: http://www.xtreme-eda.com
Company overview: XtremeEDA Corporation is a professional ASIC and FPGA design services firm. Our corporate focus is to ensure our clients technical and business success by helping them deliver their ASIC and FPGA projects on time, on budget, to the agreed functional and performance attributes and to the satisfaction of all stakeholders. We are an experienced and successful team that values long-term relationships. Our core values and technical ability is at the core of our success.
Key contact: Claude Cloutier ccloutier@xtreme-eda.com