UVM: The Next Generation in Verification Methodology

ABSTRACT

UVM is a new verification methodology that was developed by the verification community for the verification community. UVM represents the latest advancements in verification technology and is designed to enable creation of robust, reusable, interoperable verification IP and testbench components.

One of the most novel and exciting aspects of UVM is how it was developed. Rather than being developed by a single EDA vendor and rolled out as part of a marketing campaign, it was developed by a collection of industry experts representing microprocessor companies, networking companies, verification consultants, as well as EDA vendors. All the work was done under the auspices of Accellera. Within the umbrella of a standards organization, companies, some of whom compete with each other in the market place, were able to come together in a collaborative environment to address the technical challenges of building a sophisticated verification methodology. Each representative brought in expertise and perspectives from their segment of the industry. The result is a powerful, multi-dimensional software layer and methodology for building verification environments. Of course, UVM has been tested on all simulators of the major EDA vendors. UVM is truly an industry initiative, one in which Mentor is proud to participate.