First time’s a charm for FPGA verification at Lockheed Martin Space Systems Company
Moving from testbenches requiring manual checking to a methodology that embraced automated constrained random testing helped Lockheed Martin verify an FPGA bound for the NOAA/NASA GOES-R satellite launching in 2015.
“When we first said that we were going to have success on our first try, a lot of people were laughing”
Learn More about Questa Verification Management
product overview: There are three dimensions to any IC design project: the process, the tools and the data. Questa® offers a comprehensive approach to the problem with its verification management option that handles all within a scalable and modular solution.
Solving verification challenges that are unique to space-based FPGAs
There is a premium on smart, efficient verification for FPGAs headed to outer space. It’s critical that design and verification teams get things right the first time because, for devices that will eventually operate at several hundred miles or more above the Earth’s surface, it’s impossible to just upload a new image to patch a faulty FPGA. (And in the case of GOES-R the point is moot, since the FPGAs are of the burn-once variety.) Plus, every effort is made to limit the number of hands tinkering with the hardware as it makes its way to the launch pad. This means the oft-used practice of repeatedly burning a new FPGA and then seeing what happens in a testing lab is off limits, especially since antifuse radiation hardened FPGAs cost several thousand dollars each.
Build reusable self-checking testbenches with SystemVerilog and OVM
First, Lockheed Martin trained its verification team in SystemVerilog and OVM, mostly through the Mentor Graphics Verification Academy. Next, the team built a testbench framework that replaced writing directed tests in VHDL with automated constrained random testing of corner cases and overall robustness. And by using Mentor Graphics Questa Verification Management, the team tracked code and functional coverage metrics in the test plan.
The Lockheed Martin team built a framework organized around a set of template classes that now more or less force their design and verification engineers to conform to the verification methodology created with the help of Mentor Graphics OVM experts. Originally built for the GOES-R project, the framework has subsequently proved to be remarkably effective in a range of contexts. Indeed, it’s now possible to basically unzip a file, run a rename script and have a skeleton of a verification environment up in a matter of minutes. But all on the team agree that the best measure of success can be summarized in three words describing efforts to verify the NOAA/NASA-bound FPGA: first pass success.
“There hasn’t been a single functional error that has come up in the lab that we just flat out missed in verification.”
About Lockheed Martin Space Systems Company
Lockheed Martin Space Systems Company designs, develops, tests, manufactures and operates a full spectrum of advanced-technology systems for national security and military, civil government and commercial customers.
- STMicroelectronics: Simulation + Emulation = Verification Success
- Lockheed Martin Space Systems Company
- Dot Hill Systems Corp.
- Xsigo Systems
- ON Semiconductor
- Institute of Microelectronics
- Evatronix IP
- National Semiconductor
- Sun Microsystems: Three-Million Gate Design
- Sun Microsystems: Multi-Clock Design
- STMicroelectronics - mixed analog-digital verification success with OVM
- Advanced Micro Devices
- Hyperstone: ModelSim with SystemVerilog DPI
- Hyperstone: SystemVerilog DPI