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Mitsubishi Selects Veloce Hardware-Assisted Verification Solutions

Veloce proved to be the comprehensive, flexible, and high-performance hardware-assisted verification solution that Mitsubishi needed for its SoC verification methodology, including its HDTV video decoder IP.

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We decided to transition to Mentor’s Veloce hardware-assisted verification platform due to better capacity in a smaller footprint, faster compile time, and MHz-class runtime. ”

Noriyuki Minegishi, Mitsubishi Electric Corp.

Mitsubishi’s scalable verification methodology

Producing high-quality, first-pass silicon chips for multimedia devices is critical to Mitsubishi’s success. They knew that software simulation was not going to be an option in the face of increasing design capacity, application complexity, and time-to-market demands.

They chose a bottom-up approach to their verification; from block level to chip level, and finally to system level. This methodical approach delivers the reliability and efficiency Mitsubishi needs. Mentor’s hardware-assisted verification platform (Veloce) provided a flexible verification capability at each verification phase, delivering on Mitsubishi’s high-performance demands.

In-circuit emulation and clock implementation capabilities

Mentor’s ICE capabilities allowed Mitsubishi to adopt ICE solutions for parts of their design (RISC processor and DSP) that were supplied by 3rd party vendors – for which the company had no models. As a result, Mitsubishi had a vendor-certified and accurate representation of their processors in the design – and thus, were able to accelerate verification.

There was also a critical need for multiple clock domain handling in Mitsubishi’s multimedia designs. The inherent architecture of the platform’s emulation-on-chip allowed Mitsubishi to take advantage of real-world behavior and avoid risks of chip failure due to clock domain issues.

Mitsubishi’s next-generation HDTV video decoder IP

Mitsubishi also adopted Mentor’s Veloce hardware-assisted verification platform for its multi-standard HDTV video decoder IP. Each of Its three video standards is complex to test, but Veloce also had to handle the tests in a real-world environment. There was also verification complexity and a large volume of tests.

So far, the HDTV video decoder emulation identified over 60 bugs in the first phase and 8 more in the second phase. Unquestionably, this will help ensure first-pass success. Mentor’s Veloce emulation-centric verification flow also helped Mitsubishi reduce hardware development time, and allowed verification teams to run more verification cycles, which ultimately help prevent tapeout delays and costly respins.

 

We taped-out a design of a multi-standard HDTV video decoder using Veloce, so far the HDTV video decoder emulation identified over 60 bugs prior to tape-out, ensuring high quality in the RTL.”

Noriyuki Minegishi, Mitsubishi Electric Corp.

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