Questa Codelink
Debugger for RTL Processor-Driven Test
Questa Codelink is a graphical source-level debugger for code executing on RTL processor models from ARM and MIPS. It connects to your existing signoff model and makes no change to your design or simulation results.
During simulation Codelink records a software log-file and delivers post simulation interactive HW/SW debug. A lengthy batch simulation can be replayed in seconds, eliminating the need to re-simulate a failing test in order to debug it.
Just imagine. No more slogging though symbol tables or assembly listings to debug a failing batch run. Questa Codelink dramatically reduces the time it takes to debug processor-driven tests.
Features
- Graphical debug of source/assembly
- Interactive post simulation debug of batch and regression runs
- Step forward and backward through C and assembly execution
- View registers, software variables, memory, and call stack
- Compatible with RTL or compiled SmartModel processor representations
Questa Codelink Pro
Speed ARM based simulations with a high-speed cycle-accurate processor model
Codelink Pro offers the same debug as Codelink but includes a cycle-accurate model of the ARM core, which executes code 10,000x faster than a design signoff model (DSM). Overall simulation speed improves by 5x to 10x depending on the ratio of SW execution to logic simulation.
If you’re willing to forgo signoff accuracy in exchange for faster simulation, Codelink Pro is the answer. Use Codelink Pro to quickly iterate through test development, and Codelink to debug final signoff simulations.