Managing Design Complexity Through High-Level C-Model Verification


Contributor: Mike Andrews
 
Format: PDF Document
 
The increasing complexity of embedded system design, combined with shorter product life cycles, and an intensified competitive landscape continues to push the limits of embedded design methodology. Complex designs contain more devices and, thus, greater interoperability. A strategy to resolve this complexity problem is to raise the level of modeling abstraction by working in higher-level, behavioral models written in C or HDL. This paper describes some of the benefits of working at this level of abstraction using a C-based design optimization and verification methodology.



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