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IC Manufacturing Blog

Posts tagged with 'triple patterning'

3 Mar, 2014

Lights! Camera! Multi-Patterning!

Posted by Shelly Stalnaker

Shelly Stalnaker David Abercrombie recently met with Brian Bailey of Semiconductor Engineering to explain many of the concepts and issues of multi-patterning that he has been writing about for the last couple of years. If you want to understand the basics of multi-patterning requirements, 12 minutes is all you need to check out their first video: Tech Talk: Multipatterning on semiengineering.com. If the video piques … Read More

double patterning, EUV, 20nm, Multi-Patterning, triple patterning, IC Design, ic manufacturing

29 Jan, 2014

UPDATE: Multi-Patterning Unmasked!!

Posted by Shelly Stalnaker

Shelly Stalnaker Download the latest version of our guide to multi-patterning design and debugging, containing links to all of David Abercrombie’s detailed educational articles on SemiEngineering.com, along with links for complementary reference and learning options. Whether you are already working on designs with multi-patterning requirements, or just beginning multi-patterning work, you will benefit from David’s … Read More

triple patterning, double patterning, IC Design, Debugging, Physical Verification, SADP, ic manufacturing, Multi-Patterning

 
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