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Industry Article:Cutting the Key to 14nm Lithography

Mon, 08 Apr 2013 07:00:00 GMT

White Paper:Mask data preparation flow for advanced technology nodes

Thu, 17 Jan 2013 08:00:00 GMT

The trend to reduce critical features dimension has dramatically increased design file size. Design tape–out flows at the 28 nm technology node handle post-OPC data files that reach hundreds of gigabytes. This trend increases at 20 nm and below. That predicts new challenges in mask data preparation flow for advanced technology nodes. We have developed a mask data preparation flow to tackle the challenge of maintaining a consistent delivery time to mask shops, while efficiently using exiting hardware. Taming data file size required innovations in data processing for fractured data files creation and also in data review techniques. The paper will discuss these innovations and conduct a demonstration with results in a 28 nm technology node production flow. Cost-benefit analysis will be illustrated with runtime comparisons of fractured data creation, and data review between traditional mask data preparation flows and this specific flow.

White Paper:Roadmap to sub-nanometer OPC model accuracy

Wed, 16 Jan 2013 08:00:00 GMT

OPC models describe the entire patterning process, including photomask, optics, resist, and etch as a set of separately characterized modules. It is difficult, however, to definitively calibrate the optics model because the aerial image is not easily measurable. There are a number of methods of calibrating photomask, optical, and resist, and etch parameters. This paper will systematically explore the impact of all components in the photomask and optical models, and will provide a pathway to sub-nanometer accuracy required for 20 nm technology.

White Paper:Weighting evaluation for improving OPC model quality by using advanced SEM-Contours from wafer and mask

Wed, 16 Jan 2013 08:00:00 GMT

In this study, the weighing function of Calibre ContourCal, was evaluated using a familiar OPC data set used in previous published research. We discuss the quality of OPC model by applying different weighting factors for 1D and 2D structures.

White Paper:OPC model prediction capability improvements by accounting for mask 3D-EMF effects

Wed, 16 Jan 2013 08:00:00 GMT

As mask feature sizes have shrunk well below the exposure wavelength, the thin mask of Kirchhoff approximation breaks down and 3D mask effects contribute significantly to the through-focus CD behavior of specific features. While full-chip rigorous 3D mask modeling is not computationally feasible, approximate simulation methods do enable the 3D mask effects to be represented. The use of such approximations improves model prediction capability. This paper will look at a 28nm darkfield and brightfield layer datasets that were calibrated with a Kirchhoff model and with two different 3D-EMF models. Both model calibration accuracy and verification fitness improvements are realized with the use of 3D models.

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Thu, 14 Jun 2012 07:00:00 GMT

Automated Mentor Flow Quickly Yields High-Quality Portable PDKs for X-FAB.

White Paper:EUV OPC for 56 nm Metal Pitch

Mon, 11 Jun 2012 07:00:00 GMT

For the logic generations of the 15 nm node and beyond, the printing of pitches at 64nm and below are needed. For EUV lithography to replace ArF-based multi-exposure techniques, it is required to print these patterns in a single exposure process. The k1 factor is roughly 0.6 for 64nm pitch at an NA of 0.25, and k1 0.52 for 56nm pitch. These k1 numbers are of the same order at which model based OPC was introduced in KrF and ArF lithography a decade or so earlier. While we have done earlier work that used model-based OPC for the 22nm node test devices using EUV,1 we used a simple threshold model without further resist model calibration. For 64 nm pitch at an NA of 0.25, the OPC becomes more important, and at 56nm pitch it becomes critical. For 15 nm node lithography, we resort to a full resist model calibration using tools that were adapted from conventional optical lithography. We use a straight shrink 22 nm test layout to assess post-OPC printability.

White Paper:Aerial Image Retargeting (AIR): Achieving Litho-Friendly Designs

Mon, 11 Jun 2012 07:00:00 GMT

In this work, we present a new technique to detect non-Litho-Friendly design areas based on their Aerial Image signature. The aerial image is calculated for the litho target (pre-OPC). This is followed by the fixing (retargeting) the design to achieve a litho friendly OPC target. This technique is applied and tested on 28 nm metal layer and shows a big improvement in the process window performance. For an optimized Aerial-Image-Retargeting (AIR) recipe is very computationally efficient and its runtime doesn’t consume more than 1% of the OPC flow runtime.

White Paper:EUV Flare and Proximity Modeling and Model-based Correction

Mon, 11 Jun 2012 07:00:00 GMT

The introduction of EUV lithography into the semiconductor fabrication process will enable a continuation of Moore’s law below the 22 nm technology node. EUV lithography will, however, introduce new and unwanted sources of patterning distortions which must be accurately modeled and corrected on the reticle. Flare caused by scattered light in the projection optics is expected to result in several nanometers of on-wafer dimensional variation, if left uncorrected. Previous work by the authors has focused on combinations of model-based and rules-based approaches to modeling and correction of flare in EUV lithography. This paper focuses on the development of an all model-based approach to compensation of both flare and proximity effects in EUV lithography. The advantages of such an approach in terms of both model and OPC accuracy will be discussed. In addition, the authors will discuss the benefits and tradeoffs associated with hybrid OPC approaches which mix both rules-based.

White Paper:Reducing shot count through Optimization based fracture

Mon, 11 Jun 2012 07:00:00 GMT

The increasing complexity of RET solutions with each new process node has increased the shot count of advanced photomasks. In particular, the introduction of inverse lithography masks represents a significant increase in mask complexity. Although shot count reduction can be achieved through careful management of the upstream OPC strategy and improvement of fracture algorithms, it is also important to consider more dramatic departures from traditional fracture techniques. Optimization based fracture allows for overlapping shots to be placed in a manner that allows the mask intent to be realized while achieving significant savings in shot count relative to traditional fracture based methods. We investigate the application of Optimization based fracture to reduce the shot count of inverse lithography masks, provide an assessment of the potential shot count savings, and assess its impact on lithography process window performance.