Model Based Mask Process Correction and Verification for Advanced Process Nodes

ABSTRACT

The extension of optical lithography at 193nm wavelength to the 32nm node and beyond drives advanced resolution enhancement techniques that impose even tighter tolerance requirements on wafer lithography and etch as well as on mask manufacturing. The presence of residual errors in photomasks and the limitations of capturing those in process models for the wafer lithography have triggered development work for separately describing and correcting mask manufacturing effects. Long range effects – uniformity and pattern loading driven - and short range effects – proximity and linearity – contribute to the observed signatures. The dominating source of the short range errors is the etch process and hence it was captured with a variable etch bias model in the past [1]. The paper will discuss limitations and possible extensions to the approach for improved accuracy. The insertion of mask process correction into a post tapeout flow imposes strict requirements for runtime and data integrity. The paper describes a comprehensive approach for mask process correction including calibration and model building, model verification, mask data correction and mask data verification. Experimental data on runtime performance is presented. Flow scenarios as well as other applications of mask process correction for gaining operational efficiency in both tapeout and mask manufacturing are discussed.