The most comprehensive IC design, verification, DFM and test technologies available today
Our technologies address the most pressing challenges facing IC development teams for custom analog and digital, digital place and route, mixed-signal and system-on-chip (SoC) designs. Tight collaboration with foundries, IC design houses, systems companies, research and development labs, and industry standards organizations ensures our tools meet state-of-the-art requirements and deliver real competitive value.
Mentor Graphics offers industry leading high-performance simulation and verification solutions for complex analog/mixed-signal System-on-Chip designs.
Calibre Design for Manufacturing
Building on our powerful, production-proven Hyperscaling architecture, Calibre delivers the broadest, most accurate, and best performing DFM solutions in the industry.
Verification & Signoff
Calibre IC Verification & Signoff
Mentor Graphic's IC verification and sign-off includes traditional rule-based physical verification, parasitic extraction, and automated technologies that help improve yield.
- Calibre Advanced Topics: Writing PERC Rules Calibre Advanced Topics: Writing PERC RulesSan Diego, CA • http://www.mentor.com/training/courses/calibre-advanced-topics-writing-perc-rulesApr 29–May 1 Calibre Advanced Topics: Writing PERC RulesSingapore, SG • http://www.mentor.com/training/courses/calibre-advanced-topics-writing-perc-rulesJul 23–25
- Calibre Advanced Topics: Mastering Calibre eqDRC Calibre Advanced Topics: Mastering Calibre eqDRCSingapore, SG • http://www.mentor.com/training/courses/calibre-advanced-topics-mastering-calibre-eqdrcMay 7–9
- Calibre Design-to-Silicon Platform Workshop Calibre Design-to-Silicon Platform Workshophttp://www.mentor.com/products/ic_nanometer_design/events/calibre_physical_verification_workshopFremont, CA • May 15, 2014 Calibre Design-to-Silicon Platform Workshophttp://www.mentor.com/products/ic_nanometer_design/events/calibre_physical_verification_workshopFremont, CA • Jun 26, 2014