IC Design and Circuit Design Verification
Mentor Graphics offers the most comprehensive IC implementation environment available today.
Our solution combines the ground-breaking Olympus-SoC trade; place-and-route system &, the industry-standard Calibre® physical verification and design-for-manufacturing product suite, and the Calibre InRoute design and verification platform. These industry-leading products provide a comprehensive "Design-to-Silicon" solution.
Introducing Calibre Pattern Matching
Pattern-driven design correction, analysis and verification. Learn More
Introducing Calibre xACT 3D
High performance extraction engine integrated into design flows reference-level accuracy. Learn More
Introducing Calibre InRoute
Delivering true signoff analysis and automatic DRC/DFM fixes during implementation. Learn More
IC Design Tools
Olympus Place-and-Route System
Mentor's IC implementation system, Olympus-SoC, delivers innovative technologies for fast and high-quality design closure at advanced process nodes.
AMS Design, Verification and Layout
Mentor delivers a set of AMS design tools built on the ICStudio platform to address design, verification and layout in an efficient, integrated way.
Calibre DFM Platform
Building on our powerful, production-proven Hyperscaling architecture, Calibre delivers the broadest, most accurate, and best performing DFM solutions in the industry.
Calibre IC Verification Platform
Mentor's IC verification and sign-off includes traditional rule-based physical verification, parasitic extraction, and automated technologies that help improve yield.
IC Design Resources
IC Design White Papers
Implementation-Quality Prototyping with Olympus-SoC: Accelerating Design Closure for Advanced ICs
The growing complexity of today’s ICs and tight market schedules are driving a demand for more powerful solutions for design prototyping. Prototyping helps designers determine the feasibility... View White Paper
Critical Feature Analysis as Golden Path to DFM Closure
This paper discusses the features implemented in a Design for Manufacturability (DFM) checker for Critical Feature Analysis of Very Deep Sub-Micron (VDSM) layout designs. This checker leverages... View White Paper
TrustMe-ViP: A Virtual RF System Platform Project for TPD
Shrinking feature sizes and advanced fabrication technologies enable IC designers to integrate more functionality onto a single chip (SoC: System on Chip), in particular in the Trusted... View White Paper
Upcoming Events
Calibre Design-to-Silicon Platform Workshop
Event: Learn how to leverage the superior performance and capacity of the Calibre design-to-silicon platform, a comprehensive suite of tools designed to address the complex handoff between design and manufacturing. Aug 12, 2010 : Irvine, CAAug 26, 2010 : San Jose, CA View Event
Foundry Partners
Mentor Graphics has teamed up with the world's top foundries, including Chartered, Donbgu HiTek, IBM, TSMC, and more, to jointly develop and qualify Calibre DRC, LVS, and PEX rule files. More
From the Blogs
On-line session covering the DAC presentation for Calibre xACT 3D
For customers who were unable to attend DAC this year, we are hosting Mentor @ DAC Extended. The registration is at: http://www.mentor.com/events/mentor-dac-extended/
What is Mentor @ DAC Extended?
Mentor…View Blog Post
News & Press
- Mentor Graphics’ Olympus-SoC Place and Route System Now Supported by X-FAB
- Mentor Graphics Provides Comprehensive Verification Support in TSMC Analog/Mixed Signal Reference Flow 1.0
- Mentor Graphics Extends TSMC Reference Flow 11 with Support for ESL and Integrated Design and Manufacturing Closure
- More