Advanced Verification Environment
As designs become more complex and geometires continue to shrink, designing and verifying the transistors that compose integrated circuits is increasingly difficult.
ICanalyst™ is an advanced verification cockpit that enables designers to easily leverage the full complement of Mentor Graphics analog mixed-signal solutions for design verification and analog cell characterization: Questa® ADMS for mixed-signal, Eldo® (Classic and Premier) for SPICE, and ADiT™ for Fast-SPICE applications. ICanalyst accomplishes this through an optimized design flow purposed for automating repetitive tasks.
- Improves sign-off confidence by increasing verification coverage and shortening verification schedule
- Assists IP library validation with quick set up and easy exploration of results
- Facilitates design reviews and knowledge-sharing among design teams with automated document generation
- Saves time on verification scripting, output file parsing, and results interpretation/ management
- Manages multiple designs with continual updates and multiple testbenches with incremental modifications
- Optimizes simulation efficiency with integration of load balancing tools, such as Platform LSF® and Oracle® Grid Engine
- Provides spreadsheets and graphical representations of simulation result data
- Offers a specification-driven environment
- Enables real-time simulation result and yield browsing
A comprehensive environment for verifying complex AMS SoC designs.
Industrial strength general-purpose parallelized analog simulator.
Faster-SPICE, high-performance analog simulator for very large circuits.
Efficient time-domain simulation with RF modulation.