Calibre RVE

  • Allows cross probing of results between layout, schematic, source netlist, layout netlist and LVS result files
  • Enables viewing of all parasitics in the Parasitic Browsing window
  • Highlights to schematic capture tools
  • Automated short isolation debugging
  • Fast and intuitive hierarchical SPICE browser for source and layout netlists
 

Benefits

 
  • Seamless integration with popular design environments preserves the investment in EDA tools
  • Quick, intuitive debugging in cell/block and full-chip designs
 
 
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