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Doc, it hurts when I stream out ...

Joe Davis

Joe Davis

Posted Sep 22, 2009

Then, as the old adage says, … “don’t do that.” Periodically, we get a complaint from someone who is becoming concerned about the time it takes to stream out GDSII from their P&R tool in order to run Calibre. We keep making Calibre faster and faster, so eventually the stream-out time starts to look big and hairy. In the typical final verification loop, you may have to do this whole stream, verify, fix, stream, verify, fix, a few times. If the verification time is 2 hrs and it takes more than 20 minutes to stream out, you start to get concerned about the stream time.

The root of the problem is that, if you are doing final verification, you need to merge the top-level from the P&R tool with the cells that contain the base layers. In some modern design flows, this can mean merging literally 100’s of files with the top level and streaming it out. P&R tools are famous for being slow at doing just this.

Luckily, there are several cures for this ill. First, instead of doing the merging in the P&R tool, you can stream out only the top level from the P&R tool and use Calibre to merge the libraries on input. This is very easy and can be implemented very quickly. If you want to got even further, you can introduce another step in the middle where you use Calibre DRV’s filemerge utility to merge the 100’s of input files and then push it into Calibre DRC.

The table below shows the results from just such an example with a real customer test case.

  1. merge in P&R and stream out                        : 120 min
  2. merge on input to Calibre                               :  60min
  3. merge with Calibre DESIGNrev filemerge :   8min

So, just using the right tool for the job gives a 15x improvement in the time to do the merging that you have to do before you even get to running verification.

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About Joe Davis

Joe DavisJoe Davis' career in the IC industry spans over 20 years at high-profile companies such as Analog Devices, Texas Instruments and PDF Solutions. He has worked on both sides of the EDA relationship, both designing ICs, and developing tools for IC designers and manufacturers. He is now Mentor's Product Manager for Calibre interactive and integration products where he applies his expertise in data visualization and engineering workflow. Prior to joining Mentor Joe was the senior product manager for yield simulation products at PDF Solutions where he managed semiconductor process-design technologies and services, including yield simulation and analysis tools. Joe enjoys sailing, gardening, hiking and living and working in new places and cultures, having built teams on three different continents. Joe earned his BSEE, MSEE and Ph.D. in Electrical and Computer Engineering from North Carolina State University. Visit Joe Davis' Blog

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