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Goooaaaaaaaaaaaaal!

The World Cup is here! Every four years, the culmination of hundreds of qualifying matches around the world brings the best national teams wc2014-balltogether for nearly a month of intense competition to determine the world champion football team (Sorry, USA, but it’s football everywhere else). New national uniforms are unveiled, shoe companies vie to sponsor the best players and teams with their most advanced technology, and the official ball is announced. Because every ball design provides slightly different performance qualities, the 2014 World Cup match ball, the Adidas Brazuca, was provided to all the qualifying teams back in 2013, enabling them to use the ball in training and friendly competitions to become familiar with its handling characteristics. This familiarization period before the World Cup matches begin ensures that all the teams can come into the competition prepared to play at their best, with no surprises.

What does this have to do with IC designs? Well, as the foundries develop a new process, they use a certain set of verification tools to establish the manufacturing requirements and design rules that help ensure adequate yield and performance at that process node. As a foundry converges on a final process, it releases frequent updates to the provisional design rules, based on the results of simulations, analyses, and test chips. A fabless company working at the leading edge must be prepared to quickly update and incorporate these changes into their design flows if they want to get to market first with the most advanced designs.

However, if that fabless company is not using the same verification toolset as the foundry, they have a problem. The foundry does not have time or resources during a process development to evaluate every verification toolset in the market against its design rules. Once a process is considered production-ready (although we know no process is ever really final), the foundry issues a final design rule manual. Other verification tool vendors can then validate their rule decks against this manual, but that takes time and effort. Design companies that were using the same verification toolsets as their foundries are already off and running to production, because they were in step with every change coming out of the process development phase. They didn’t have to wait for their EDA vendor to receive process certification from the foundry.

Like the World Cu2014-fifa-world-cup-trophyp teams, having the opportunity to use the same verification tools as your foundry means you can bring your best game to the field, with no surprises. By the time you are ready for tapeout, you already know how the process works, what its unique characteristics and requirements are, and how to best implement your design flow to ensure successful production and performance.

Gooooaaaaaaaaaaaaaaal!

Mentor Graphics Design and Verification Tools Certified for Full Production of TSMC 16nm FinFET

Mentor Graphics Supports a Common Signoff Environment for Samsung and GLOBALFOUNDRIES 14nm FinFET

Mentor Graphics Tools Fully Enabled for Intel Custom Foundry 14nm Processes

IC Verification, ic manufacturing, Mentor Graphics, DRC, DRM, Design Rules, Foundry, process flow, IC Design, Fabless

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About Shelly Stalnaker

Shelly StalnakerI believe in the well-written sentence, the eye-catching title, and the satisfaction of hearing someone say, “Now I get it.” I believe there ought to be a constitutional amendment outlawing the use of the third person and passive tense in technical writing. I believe a writer can explain and entertain at the same time, and I believe that everyone, even in the business world, has a story to tell. Visit Foundry Solutions

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