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So, why not just write better rules?

In my previous post about TSMC making some DFM analysis steps mandatory at 45nm, I ended with a question about why the foundries can’t just write better design rules (and rule decks) to make sure all designs yield well. This is a topic that has been discussed elsewhere, but here’s my take on it.

If we take a step back for a moment, there is something generic about DFM analysis that needs to be considered. Each type of DFM analysis has a “sphere of influence” in its scope. For CMP analysis, the analysis window size is around 20um. That’s large compared to a standard cell. For Critical Area Analysis (my favorite tool), the analysis scope is the size of the largest random particle to be considered, typically anywhere from 2um to 10um diameter. For Lithography analysis (LFD), the scope is a little smaller, roughly 1-2um.

How does this get back to rules? What’s the scope of a generic DRC rule? A shape all by itself, or a shape within a shape, or a shape and its nearest neighbors. In common practice, that’s about it in DRC land. Mentor has eqDRC, an extension of the Calibre nmDRC product that allows you to write equations to express rules instead of using fixed values, but you still can’t easily get past the nearest neighbor in a DRC rule. Yes, you can write complex rules to go one or two shapes past the nearest neighbors, but the complexity of the rule and its runtime will go up exponentially, the farther you try to go from the original shape. What this means is that it will be difficult if not impossible to write rules that take into account enough of the context of the shape being checked. DFM tools automatically take context into account. That’s the big advantage of model-based, over rule-based analysis.

At this point, DRC is “necessary but not sufficient.” The more “not sufficient” it becomes, the greater the need for DFM tools that see the extended context of all shapes in the design that are close enough to have any adverse effect. Of course, the farther upstream you find and fix a DFM issue, the easier it is to fix. That’s why I expect this trend of pushing the designers to do DFM analysis to continue, and for more foundries to follow TSMC’s lead.

By the way, the comment about DRC being necessary but not sufficient is not meant to belittle DRC. DRC is of course, mandatory at all nodes. DRC is also absolutely necessary in a DFM flow because for one thing, all DFM tools assume the design to be (essentially) DRC clean. If you get too far outside the allowed range of analysis in DFM because the design is not clean, the results can be inaccurate.

Ah, but Restricted Design Rules (RDRs) are going to fix everything, right? We won’t even need DRC or DFM anymore, right? Not so fast…

— Simon

DRC, 45nm

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About Simon Favre

Simon FavreSimon Favre is the Technical Marketing Engineer for Calibre YieldAnalyzer. Simon has background in Processing, Custom Design, ASIC Design, and EDA. Most recently, Simon was at Ponte Solutions, which was acquired by Mentor Graphics in May 2008. Simon has extensive technical knowledge in DFM. Simon has worked with Foundries, IDMs and Fabless semiconductor companies worldwide to find the real value of DFM and to integrate DFM into their design flows. Visit Simon’s DFM Corner

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