Just like blueprints give an architect a visual representation of a building, design patterns provide engineers with a visual depiction of complex layout geometries. Design patterns have become a useful tool throughout design, verification, and test processes. This Design-to-Silicon white paper explains how Calibre Pattern Matching software can help you implement automated pattern capture and pattern … Read More
IC Design Blog
Posts tagged with 'D2S'
While processes like double and triple patterning may sometimes seem like magic, successfully implementing multi-patterning compliance in the IC design and verification flow requires a thorough understanding of multi-patterning techniques and their impact on your design. In this white paper from David Abercrombie, learn what multi-patterning is, why you need it, and how Calibre Multi-Patterning software … Read More
odd cycle, multipatterning, 16nm, Lithography, 20nm, mandrel, Mentor Graphics, Multi-Patterning, 14nm, colorless design, layout decomposition, D2S, LELE, anchor path, litho, Calibre Multi-Patterning, litho-etch-litho-etch, FinFET, double patterning, Foundry, warning rings, Parasitic Extraction, spacer-assisted, triple patterning, spacer is dielectric, spacer is mask, SID SADP, SIM SADP, pin coloring, pitch-split
- Lights! Camera! Multi-Patterning!
- Vector? Vectorless? What’s a power grid to do?
- Mentor's TSMC OIP Presentations Now Available!
- Variability is EVERYWHERE!
- UPDATE: Multi-Patterning Unmasked!!
- The Trouble with Triples—Part 2
- TSMC OIP presentations now available!
- FinFET Fever...or FinFET Fear?
- 2014 is Underway! What's on Your Calendar?
- Routing Closure Challenges at 28nm and Below
- March, 2014
- February, 2014
- January, 2014
- December, 2013
- Qualification Is Just the Beginning
- Pattern Matching: Blueprints for Further Success
- Mastering the Magic of Multi-Patterning
- The Trouble With Triples—Part 1
- Reducing the Tapeout Crunch with Signoff Confidence
- Foundry Solutions Video Blog: Calibre PERC
- Customizing Calibre Jobs without Editing Rule Decks
- Model-Based Hints: GPS for LFD Success
- October, 2013
- September, 2013
- July, 2013
- April, 2013
- March, 2013
- December, 2012
- March, 2012
- May, 2011
- April, 2011
- February, 2011
- January, 2011
- November, 2010
- August, 2010
- June, 2010
- May, 2010
- April, 2010
- March, 2010
- February, 2010
- January, 2010
- December, 2009
- November, 2009
- October, 2009
- September, 2009
- August, 2009
- July, 2009
- June, 2009
- "Waive" of the Future?
- How do you debug LVS?
- DFM for Non-PhD's: Part 2 - Reliability
- Mixed-Signal SoC Verification
- Process Variation: The Use of In-Die Variation
- DFM for Non-PhDs
- Calibre Everywhere -- the customer value of universal integration
- So, why not just write better rules?
- To be the man, you've gotta beat the man!
- Power in need, Power indeed
- May, 2009