David's DAC09 - Another Special Guest
Well, day two of DAC started a little earlier than the first day. I had to attend the speakers breakfast for the paper I was going to give later that day. However, after breakfast I had my 9am suite presentation on eqDRC again and I also had a special guest again. This time it was Robert Boone from Freescale in Austin, TX. He works in the DFM team and he also agreed to come tell everyone what he and … Read More
Tags: Reliability, IC Verification, Yield, Physical Verification, Design for Manufacturing, DAC, DRC, IC Design, Improvability, Design Rule Checking, Design Rules