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IC Design Blog

Posts tagged with 'Level Shifter'

4 Feb, 2010

Arvind Narayanan Step 0 Commitment – Are you really sure you want to MV? Are you positive that Multi-Vt & Clock gating would not help with your power budgets? Proceed to step1 with caution only if you really must. Step 1 Architecture Selection – Ensure that the architecture is frozen and capture all the power constraints required for the chosen MV style in the UPF file. As most of you are aware this can also be done … Read More

Isolation Cells, Level Shifter, Always on Buffers, Power Switches, UPF, MTCMOS, Multi-Voltage

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