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IC Design Blog

Posts tagged with 'tape-out'

22 Jan, 2011

Dawn at the OASIS

Posted by Joe Davis

Joe Davis Almost 10 years ago, as the industry was starting to adopt model-based OPC and other resolution enhancing techniques on a large scale, the ITRS got out its looking glass and saw an “explosion” in the size of the files used to describe chip layouts. As a result, a group of industry companies collaborated to create a SEMI spec for the OASIS format for layout data. The format was officially … Read More

diffusion of innovation, GDSII, Adoption, RET, tape-out, OASIS, OPC

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