Calibre InRoute: True Manufacturing Signoff During Design

Calibre® InRoute combines the power of Calibre and Olympus-SoC to improve design quality, eliminate late-stage surprises, and significantly reduce time to signoff.

Calibre InRoute

Key Features

  • Native invocation of Calibre signoff engines during place and route
  • Support for window or batch mode analysis and repair
  • Perform automatic, timing-driven repair of DRC, LVS, CAA, CFA, CMP, and LFD violations
  • GDSII abstractions on-demand
  • Innovative and scalable Open Router architecture
  • Easy Calibre environment setup and rule selection

Physical Implementation Driven by True Signoff Verification

Calibre InRoute allows the Calibre verification and DFM platform, the industry's preferred golden signoff tool, to drive routing and optimization within the Olympus-SoC™ place and route environment. You get proven Calibre verification plus automated fixing, which eliminates time-consuming manual repairs and multiple iterations between design and signoff. With this improvement to the design flow, you can reduce design margins, reclaim timing after DRC/DFM repairs, and get a more manufacturable design in less time.

Unique Architecture of Calibre InRoute

The innovative Calibre® InRoute OpenRouter architecture allows the Olympus-SoC™ system to natively invoke Calibre SVRF-based DRC and DFM analysis in the inner loop of the router. The Calibre InRoute platform provides interactive, incremental analysis and repairs, on-demand GDSII model abstraction, and automated repair techniques targeted at specific DRC and DFM violations. The InRoute platform also performs MCMM-based analysis and optimization during yield improvement modifications to automatically minimize the impact on timing and power. The full power of the Olympus-SoC and Calibre platforms together improves design quality, eliminate late-stage surprises, and significantly reduce time to closure.

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News

Press Release: Mentor Graphics Calibre InRoute Delivers True Manufacturing Signoff During Physical Design Closure (May 3)

SOCCENTRAL: The New Standard for 32-nm IC Physical Design and Signoff (March 11)

CHIPDESIGN: IC Design Flow Must Evolve For Challenges of 28nm and Below

Besides catching manufacturability issues early in the design flow, InRoute allows us to automatically find and repair violations without leaving the Olympus cockpit. This saves engineering time and ensures that no new violations will be created by the fixes.”

Phillippe Magarshack, STMicroelectronics Technology R&D Group Vice President and Central CAD and Design Solutions General Manager

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