Calibre PERC

Calibre® Programmable Electrical Rule Checker (PERC), Mentor Graphics' newest DFM solution is designed to address advanced circuit verification to ensure optimal design yield and improve reliability.

Recommended rule specified by the Industry Council on ESD Target Levels is implemented with Calibre PERC and an ESD violation is displayed in Calibre RVE.

Reliability is a growing concern for integrated circuit designers; however, this is an area that could be better served by the electronic design automation industry. In response to this growing need, Mentor Graphics has developed Calibre PERC to address reliability challenges that arise during the circuit and electrical verification process. PERC is specifically designed to perform electrostatic discharge (ESD) and multiple power domain checks. Calibre PERC allows you to customize ERC checks at the schematic level as well as geometrical and electrical checks at layout, which gives you more power and flexibility to handle emerging circuit verification demands for design implementation.

ESD, advanced ERC, and multiple power domains are top issues on a long list of complex new geometrical and electrical verification requirements. All of these advanced requirements can only be described by a topological view rather than single device/pin to net relation. A topological view incorporates many layout-related parameters as well as circuitry-dependant checks. Calibre PERC is the first industry tool to fulfill these complex verification requirements.

Key Product Benefits

• Next Generation Circuit Verification — Calibre PERC provides the capability for advanced circuit verification. It performs necessary checks to address ESD issues, errors arising from designing across multiple power domains, and advanced ERC concerns.
• Improve Design Reliability — Calibre PERC is uniquely capable of verifying complex rules and revealing potential electrical violations that might otherwise result in short-term, long-term or even catastrophic electrical failure.
• Improve Design Accuracy — Device recognition accuracy is crucial for topological ERC identification. Built over Calibre LVS, Calibre PERC delivers the same trusted device recognition accuracy and timely execution required for world-class silicon delivery.
• Improve Runtime — Automated proprietary hierarchical and logic injection technologies provide virtually unlimited design scope with fast runtimes.
• Easy-to-Use and Fully Customizable — Similar to other Calibre products, PERC uses TCL + standard SVRF commands. This interface can be used to address proprietary methodologies for capturing electrical violations. Calibre PERC runs on any netlist, either extracted or source-originated.
• Zero Risk Performance, Investment, and Quality — Fully compatible with the Calibre Physical Verification Platform, Calibre PERC integrates easily into existing customer signoff flows.
• Superior Support Quality - the only 5-Star support in EDA.