Design Architect IC

• Schematic capture, netlisting, and simulation setup/results viewing
• Interface for fast, accurate simulations of analog/mixed-signal and RF components
• High-performance netlister
• Models blocks using schematic representations, VHDL, Verilog, SPICE, VHDL-AMS, or Verilog-A, and provides an interface to simulate the entire design
• Advanced schematic data modeling techniques
• Ability to create multiple design versions based on the same set of schematics

Benefits:

• Can quickly output designs in SPICE, HSPICE, or Verilog netlist formats
• Operates on Linux OS with full UNIX data compatibility