Calibre® YieldEnhancer offers an automated approach to layout enhancements that will improve yield. It addresses the issue of area with a core philosophy to take advantage of any white space. This method improves yield without sacrificing area. To balance performance, YieldEnhancer offers both a net-aware capability and back annotation to the design database. To determine the impact on yield, YieldEnhancer works with Calibre YieldAnalyzer to measure the impact of the layout modification.
To reduce those hot spots in a practical and efficient way, Calibre YieldEnhancer provides you with automated layout enhancements that include built-in functions optimized to maximize coverage and minimize run times. Calibre YieldEnhancer performs multi-layer operations that support multiple configurations that maximize the coverage and minimize jogs. Configurations include 1) single via additions, 2) replacement of a single via with two symmetrically placed vias, 3) edge modifications based on multi-layer checks, such as enclosure and extensions rules, and 4) single layer grow operations. Layout modifications remain DRC clean while taking advantage of as much white space as possible. To ensure you maintain design performance, Calibre YieldEnhancer also offers both a net-aware capability and back annotation to the design database.
All modifications are fully back-annotated to GDSII, OASIS®, LEF/DEF, OpenAccess™ and Milky Way™ design databases.
Features and Benefits
- Increases profitability with a system that automatically makes layout modification to improve the design's yield.
- Executes and visualizes enhancements from within all the popular layout environments
- Improves design flow by integrating with the leading design databases such as OpenAccess or Milkyway.
- Provides a layout modification platform for early yield ramp.
- Automatically modifies the layout to improve yield, including via doubling, via extensions, and enclosures, as well as growing polygons to a minimum size.
- Allows back annotation of users’ specific layout modifications for use with new technologies.
- Extends Calibre platform beyond DRC functionality to address DFM issues.
- Fully integrated with the Calibre tool suite
Calibre RVE™-graphical results viewing environment to reduce debug time by visually identifying design errors instantly in the user’s own design environment.
Calibre DESIGNrev layout viewer speeds full-chip design completions & tape-outs by rapidly loading, displaying & saving large GDSII & OASIS® files.