Accelerating Mixed-Signal Design and Custom Layout Workshop
Overview
Mentor Graphics cordially invites you to attend a FREE "hands-on" technical workshop covering the complete front-to-back analog/mixed-signal design flow in conjunction with a foundry-supplied design kit. You will experience the power of Mentor Graphics design capture, physical layout and verification tools.
Design, verify, and assemble complex mixed-signal SoCs using full- and semi-custom layout techniques
Multimillion transistor mixed-signal ICs present unprecedented design and verification challenges. During this lab-intensive technical workshop, you will gain first-hand experience evaluating the complete Mentor analog/mixed-signal design flow using a foundry-supplied design kit to create, simulate, layout and verify a mixed-mode circuit.
Seating is VERY limited to maximize your learning experience, so submit your interest immediately to request your spot. Lunch and refreshments will be provided.
Who Should Attend
- Analog/mixed-signal design engineers looking for a complete design/verification system
- Design engineers who work on both the front and back end of the IC design process
- CAD managers interested in reducing their support load
What You Will Learn
- Solutions to mixed-signal IC design and custom layout challenges
- How to increase your mixed-signal SoC design productivity
- How polygon editing and design capture can be user-friendly and intuitive
- How foundry-supported device generators can dramatically increase productivity and accuracy
- How to perform SoC chip planning and automated routing within the IC Station custom layout environment
- How to shorten LVS debug cycles with schematic driven layout (SDL) and its tight integration with Calibre
- How to easily simulate post-layout parasitics using the complete flow
- Drastically reduce your current CAD support workload
At the end of this workshop you will be able to:
- Increase your mixed-signal design productivity by 10X
- Apply Mentor Graphics layout tools to your design flow starting at any entry point, including polygon editing, device generation, SDL or netlist-driven layout
- Apply Mentor Graphics schematic and netlist-driven floorplanning, auto-interactive routing and automated, shape-based routing to your chip level integration
- Increase your layout productivity by as much as 10x-50x
- Understand how to access free foundry-supported design kits
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