TowerJazz Improves Productivity and Reliability with Calibre® PERC™
Join us at this DAC luncheon Seminar to catch a glimpse at how the leading specialty foundry, TowerJazz, has been able to improve the productivity and reliability of their foundry partner's designs. By making available a variety of ESD and power management checks in Calibre PERC, these previously time consuming, but necessary checks, can now be validated in a timely manner with comprehensive coverage.
By leveraging the unique capabilities of Calibre PERC, TowerJazz has been able to provide their foundry partners an improved reliability platform on which to validate their high-quality design rules.
Lunch will be served.
What You Will Learn
- How TowerJazz can help create and verify designs with faster turnaround time
- The benefits of using Calibre PERC to improve your circuit reliability
About the Presenters
Matthew Hogan is a Product Marketing Manager for Calibre Design Solutions at Mentor Graphics, with over 15 years of design and field experience. He is an IEEE Senior member and ACM member and holds a Bachelor of Engineering from the Royal Melbourne Institute of Technology and an MBA from Marylhurst University. He is actively working with customers who have an interest in Calibre PERC. He can be reached at firstname.lastname@example.org.
Ofer Tamir is the Director of design enablement and design support at TowerJazz. He has a Master's Degree in computer science and has worked for 25 years as an EDA engineer at companies such as National Semiconductor (CAD engineer & CAD/ layout verification) and DSPG (CAD manager).
Who Should Attend
- Directors, managers and engineers in semiconductor design, failure analysis, reliability and verification teams
How to Filter Calibre results on property values
Calibre results databases often have many results, making it hard to find the result you want to work on. In this video we will see how to filter on one or more property values so that we only see the results...
Checking for electrical overstress using Calibre PERC
This video shows how users can check for Electrical overstress using Calibre PERC and use Calibre RVE to debug the results and eliminate the source of EOS failures.
Running multi-power domain checking using Calibre PERC
In the mix signal design, it is required to have different voltages to support each domain on the chip. However, designers have to make sure there is no signal line directly across from one voltage to another...