Mixed-Signal Design Capture and Simulation within Mentor's Custom-IC Flow
There are currently no dates scheduled for this event
Overview
Come and learn how to capture and simulate/verify your mixed-signal IC designs within Mentor's integrated custom-IC Flow. In this technical hands-on workshop, you will use Mentor's Custom-IC flow and its integrated schematic, extraction and simulation tools to take a design from system specifications to post-layout verification in a seamless flow.
Who Should Attend
- Circuit & system designers
- Project leads
- Design managers
- CAD
What You Will Learn
- Taking a design, from concept to schematics and verification (pre- and post-layout)
- System-level mixed-signal simulation in a top-down methodology
- Interactive design and pre-layout simulation of an analog block
- Setting up corners and nested sweeps from within the schematic cockpit
- Post-layout extraction and re-simulation with parasitics, at block and system level
- Analysis and debug of parasitic effects between schematics, layout, and waveform viewer
- What tools will you use:
- Design Architect-IC to capture schematics and setup and manage Eldo and ADMS simulations
- Calibre xRC to extract layout parasitics
- ICstudio to create/manage IC design projects and develop HDL models
- Mentor's best-in-class Custom-IC tools working seamlessly together to design, verify and debug your mixed-signal SoCs