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Mentor Forum for Custom IC Design & Mixed Signal IC Verification

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Overview

Custom IC design is becoming more complex, with an increasing number of analog mixed-signal blocks and deeper interaction between the digital and analog content. As a result, complex and unparalleled design and verification challenges have emerged.

The Pyxis Custom Router offers a superior routing solution, from transistor to chip level, across all levels of hierarchy. The router offers automated assistance to boost routing productivity, even for nonstandard power mesh schemes across multiple power domains in the same AMS cell. The router also helps improve adherence to and compliance with important analog constraints, such as symmetry and shielding while routing both the analog and digital signals.

Analog circuits are sensitive to layout, matching and proximity and have demanding interface requirements. At advanced processes, these challenges increase exponentially. Simple simulation is no longer adequate. Traditional tool flow’s force designers to develop analog and digital subsystems in isolation; delaying integration until IC layout and complete verification until after fabrication. Improving analog mixed-signal design and verification requires a powerful AMS verification methodology supported by an integrated, AMS tool suite able to verify complex mixed-signal IP blocks and SoCs in a unified environment.

What You Will Learn

During the first half of this seminar you will learn how Mentor’s Pyxis Custom Router reduces routing time and time-to-market. You will see, first-hand, how the router’s integrated custom functionality boosts productivity and design quality. We will explore real case studies and find out how engineers from companies like ON Semiconductor and Marvell have used the Pyxis Custom Router to achieve 10x productivity gains and cut months off their overall tapeout schedules.

In the second half of this seminar you will learn how an advanced AMS verification methodology and industry-leading mixed-signal simulation solution, Questa ADMS, can help improve your design and verification productivity. Topics include:

  • Mixed-signal simulation methodology
    • Analog-on-top methodology
    • Digital-on-top methodology
  • Mixed-signal validation
  • Speed/accuracy trade-off & optimization
  • Power-supply validation
  • Mixed-signal extensions for Unified Power Format (UPF)
  • Verilog language extensions & SystemVerilog assertions

Who Should Attend

  • Engineers and managers responsible for custom analog mixed-signal design and/or custom digital design
  • CAD engineers and managers responsible for delivering the backend flow
  • CAD managers interested in the latest mixed-signal design methodologies and automation
  • System engineers performing verification of mixed analog and digital systems
  • Analog design engineers who create IP for mixed signal ICs
  • Digital design engineers who must deal with analog blocks in their designs
  • Project leaders who want to improve how well their mixed-signal designs match original specifications
  • Modeling engineers who create models for design or verification

 

Products Covered

Agenda

 

About Mentor Forums

Continued learning is a key feature of life for high-tech engineers. Mentor Forum’s provide education for customers and prospective customers on a wide range of electronic design automation technologies and solutions. Importantly they also provide opportunity for members of the electronic design community to meet experts and peers; to share ideas and discuss challenges; to network.

 
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