How Physical Implementation realizes Power Intent Web Seminar
There are currently no dates scheduled for this event. However a recording of a previous session is available as an on-demand web seminar.
View This On-Demand Web Seminar NowOverview
In this Tech Talk we will discuss how to handle power intent within a Place and Route environment whilst meeting all design constraints, modes and corners for best QoR.
The Place and Route stage of a design flow is where the power intent is realized physically for the first time. Power domains become real areas on silicon, interconnect created for power routes, power switches arrayed & placed etc.
Time and effort spent defining power intent and architecting the design earlier in the design flow pays off by giving the digital layout engineer a clear and efficient path to completing the design physically.
For each power state, the operating conditions and functional mode (i.e. sleep, standby, low power, high performance etc) will require appropriate libraries and timing constraints. The power state requirements will also drive the insertion of level-shifters, isolation and retention cells.
What You Will Learn
- What power intent information is required before physical implementation of a Low Power design
- How to interpret power intent physically
- The use of a “power format” file which defines the power state table for a design.
- Features to look for with in a Place and Route tool for low power design
About the Presenter
Tony Newbold
Tony Newbold Joined Mentor in May 2009. Previously he worked for Synopsys and Avanti as an application consultant for 9 years where he worked with all the Place and route tools such as Apollo, Astro, PhC and ICC as well as being the European Product Lead for floorplanning products. Before Synospsys/Avanti, Tony spent 3 & a half years working for Atmel doing digital layout.
Who Should Attend
- IC designers
- Digital layout designers
Technical Requirements
What do I need to watch and hear this web seminar?
Mentor Graphics’ web seminars are delivered using Adobe Connect. You will be able to login to the seminar room 15 minutes prior to the start time on the day of the presentation. You can hear the audio using your computer’s speakers via VoIP (Voice over IP) and background music will play prior to the beginning of the presentation.
Detailed system requirements
Microsoft® Windows
- Windows XP, Windows Vista, Windows 7, Windows 8
- Microsoft Internet Explorer 7, 8, 9, 10; Mozilla Firefox; Google Chrome
- Adobe® Flash® Player 10.3 or later
- 1.4GHz Intel® Pentium® 4 or faster processor and 512MB of RAM
Mac OS X, 10.5, 10.6, 10.7.4, 10.8
- Mozilla Firefox; Apple Safari; Google Chrome
- Adobe Flash Player 10.3
- 1.83GHz Intel Core™ Duo or faster processor and 512MB of RAM
Linux
- Ubuntu 10.04, 11.04; Red Hat Enterprise Linux 6; OpenSuSE 11.3
- Mozilla Firefox
- Adobe Flash Player 10.3
Mobile
- Apple supported devices: iPad, iPad2, iPad3; iPhone 4 and 4 S, iPod touch (3rd generation minimum recommended)
- Apple supported OS versions summary: iOS 4.3.x, 5.x, or 6.x (5.x or higher recommended)
- Android supported devices: Samsung Galaxy Tab 2 (10.1), Samsung Galaxy Tab (10.1), ASUS Transformer, Samsung Galaxy Tab (7”) , Motorola Xoom, Motorola Xoom 2, Nexus 7
- Android supported OS versions summary: 2.2 and higher
- Android AIR Runtime required: 3.2 or higher
Additional requirements
- Bandwidth: 512Kbps for participants, meeting attendees, and end users of Adobe Connect applications. Connection: DSL/cable (wired connection recommended) for Adobe Connect presenters, administrators, trainers, and event and meeting hosts.
More Events
TowerJazz Improves Productivity and Reliability with Calibre® PERC™
- TowerJazz Improves Productivity and Reliability with Calibre® PERC™http://www.mentor.com/products/ic_nanometer_design/events/dac-lunch-seminar Jun 4, 2013 : Austin, TX
- View Details
Calibre Design-to-Silicon Platform Workshop
- Calibre Design-to-Silicon Platform Workshophttp://www.mentor.com/products/ic_nanometer_design/events/calibre_physical_verification_workshop Jun 13, 2013 : Fremont, CA
- Calibre Design-to-Silicon Platform Workshophttp://www.mentor.com/products/ic_nanometer_design/events/calibre_physical_verification_workshop Jul 11, 2013 : Fremont, CA
- View Details
Mentor Forum for Custom IC Design & Mixed Signal IC Verification
- Mentor Forum for Custom IC Design & Mixed Signal IC Verificationhttp://www.mentor.com/products/ic_nanometer_design/events/mentor-forum-custom-ic-design-mixed-signal-verification Jun 18, 2013 : Utrecht, Netherlands
- Mentor Forum for Custom IC Design & Mixed Signal IC Verificationhttp://www.mentor.com/products/ic_nanometer_design/events/mentor-forum-custom-ic-design-mixed-signal-verification Jun 19, 2013 : Newbury, UK
- View Details
Mentor Forum - Calibre Tech Day
- Mentor Forum - Calibre Tech Dayhttp://www.mentor.com/products/ic_nanometer_design/events/mentor-forum---calibre-tech-day Oct 29, 2013 : Dan Caesarea, IL
- View Details