UMC and Mentor Robust AMS/RF Reference Flow Seminar

There are currently no dates scheduled for this event

Overview

It's a challenge to manage an RF SoC design with increasing design complexity. Mentor Graphics and UMC work in close cooperation to deliver Technology Design Kits (TDKs) and establish an AMS SoC reference flow. UMC TDK's support Mentor Graphics' front-to-back design flow. A successful VCO was designed with Mentor's simulation and extraction technologies.

To address the increasing design content in multiple application domains, UMC's industrial leading architecture group developed an AMS reference flow based on Mentor's ADVance MS platform. The reference flow allowed UMC to successfully validate a full chip mixed-signal transceiver reference design in their 130nm mixed-signal process. To fill up the gap of Analog/Mixed-Signal behavioral models, AMS modeling pioneer Dr. Ken Kundert, Designer's Guide Consultant, will present the AMS verification methodology and what they have accomplished with industrial projects.

With the combination of the TDK development and the AMS reference flow, Mentor Graphics and UMC's mutual customers have a proven approach to achieve shorter time-to-market on advanced mixed-signal processes. Using this approach yields much needed efficiencies for the AMS/RF design verification flow.

Topics Covered

  • UMC RF design readiness and Full UMC TDK support in Mentor design environment
  • Component validation with VCO
  • Advanced Verification extended into AMS SOC
    • ADMS's capability of simulating complete UWB transceiver circuit and high level design methodology

Agenda

You will be asked to select the track you wish to attend on the registration page. 

Track 1

Track 2

9:00 - 9:15 : Registration & Welcome 9:00 - 9:15 : Registration & Welcome

9:15 - 12:20 : Seminar
Topics Include -

  • UMC RF Readiness
  • Mentor Graphics IC Overview
  • Verification of Complex Analog, Mixed-Signal and RF ICs

9:15 - 12:20 : Seminar
Topics Include -

  • UMC RF Readiness
  • Mentor Graphics IC Overview
  • Verification of Complex Analog, Mixed-Signal and RF ICs

12:20 - 1:00 : Lunch

12:20 - 1:00 : Lunch

1:00 - 4:00 : Workshop
Topics Include -

  • Block Level Design & Verification with VCO. Simulation, Extraction and post layout simulation with Mentor IC flow.
  • Flexible Full Chip Verification with UWB Transceiver. Mixed-Signal Simulation and AMS behavioral modeling 
  • UMC RF Modeling

Tools demonstrated: ADVance MS, Eldo, Eldo RF, Design Architect IC and Calibre xL

Who Should Attend

Designers, technical managers and CAD teams focused on RF design
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